Instruction/ maintenance manual of the product v1.00a Xilinx
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DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 1 © 2007 Xilinx, Inc. All rights reserved. All Xili nx trademarks , registered tradema rks, patents, and disclaime rs are as listed a t http://www .xilinx.com/legal.htm . P owerPC is a trademark of IBM, Inc.
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 2 R ChipScope PLB46 IB A I/O Signals Ta b l e 1 : IB A_PLBv46 Pin Descriptions P or .
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 3 R P34 MU_2C PLB_T Attribute[0:15] Sla ve I PLB T ransf er Attribut e Address P35 M.
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 4 R The IBA_PLBv46 port s listed in Ta b l e 1 connect t o the PLBv46 bu s. The core divides re lated por ts into 13 match unit groups (MUs) as sh own in the second column of the tab le.
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 5 R a user to lo ok for multiple occurre nces of the match ev ent. This counter width is controllab le through the C_MU_xx_CNT_W parameter (xx is a place holder f or 1-13).
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 6 R G8 PLB Address Bus Width C_PLBV46_A WIDTH 32 32 Integer G9 PLB Data Bus Width C_PLBV46_D WIDTH 32,64,128 64 Integer IB A Storage Options and T rig Out G10 Number of data samples captured for e very trigger match.
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 7 R G30 0=basic, 1=basic w/ edges, 2=extended, 3= e xtende d w/edges, 4=range, 5=range w/edges C_MU_3_TYPE_ADDR 0, 1,2,3,4, 5 0 Integer G31 Match unit counter width.
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 8 R G46 1=Enable storing MU 6 signals in the data sample storage buffer . 0=Disable C_USE_MU_6A_SL V_CTL or C_USE_MU_6B_SL V_SZ_W ADDR must be 1 in order to store.
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 9 R Ta b l e 2 lists the IBA PLBv46 par ameterized f eatures . These para meters cont rol the ports that are attached to the IBA trigger and storage units .
ChipScope PLBv46 IBA (Bus Analyzer) ( v1.00a) DS619 (v1.0) September 17, 2007 www .xilinx.com Product Specification 10 R assigned f or this match group .
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