Instruction/ maintenance manual of the product dx7300 HP (Hewlett-Packard)
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Te c h n i c a l R e f e r e n c e G u i d e HP Co mpaq dx7 300 and dc7 7 00 Ser ie s Business Desk top Computers Doc u ment P art Number: 4 3 34 7 3-00 1 September 2006 This document provides information on the design, archite cture, function, and capabilities of the HP Compaq dx 7300 and dc7700 Series Business Desktop Computers.
© Copyright 2006 He wlett-Packard De velopment Company , L.P . The information contained herein is subject to change without notice. Microsoft, MS-DOS, W indows, and W indows NT are trademar ks of Microsoft Corporation in the U.S. and other countries.
T echnical R efer enc e Guide www .hp.com 5 Cont ent s 1I n t r o d u c t i o n 1.1 About this Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1 1.1.1 Online Viewing .
6 www .hp.com T echnical R efer ence Guide Cont en ts 3 Processor /Memory Subs ystem 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1 3.2 Pentium 4 Processor .
T echnical R efer enc e Guide www .hp.com 7 Cont ent s 5.5.4 Parallel Interface Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1 2 5.5.5 Parallel Interface Connector . . . . . . . . . . . . . . .
8 www .hp.com T echnical R efer ence Guide Cont en ts 8B I O S R O M 8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8–1 8.2 ROM Flashing . . . . . . .
T echnical R efer ence Guide www .hp.com 1-1 1 Introduction 1. 1 A b o u t t h i s G u i d e This guide pro vides technical information about HP Compaq dx 7300 and dc77 00 series personal computers that feature Intel Pentium processors and the Intel Q965 chipset.
1-2 www .hp.com T echnical R efer ence Guide Intr oduction.
T echnical R efer ence Guide www .hp.com 1-3 Intr oduction 1. 4 S e r i a l N u m b e r The unit's serial number is located on a sticker pl aced on the e xterior cabine t. The serial number is also written into f irmware and may be read with HP Diagnostics or Insight Manager utilities.
1-4 www .hp.com T echnical R efer ence Guide Intr oduction 1 .6 Comm on Ac ron yms and Abbre viations T able 1-1 lists the acronyms and ab bre viations used in this guide.
T echnical R efer ence Guide www .hp.com 1-5 Intr oduction Ch Chan nel, chapter cm centimeter CMC cache/me mory contro ller CMOS complimentary metal-ox ide semiconduc tor (configur ation memory) Cntlr contr oller Cntrl contr ol codec 1 . coder /decoder 2 .
1-6 www .hp.com T echnical R efer ence Guide Intr oduction E SCD Extended S ystem C onf igur ation Data (fo rmat) EV Env ironme ntal V ariable (data) ExCA Ex changeable Car d Ar chitec ture FIFO f irs.
T echnical R efer ence Guide www .hp.com 1-7 Intr oduction Kb/KB kilobits/kilobytes (x 1 02 4 bits/x 1 0 2 4 bytes) Kb/s kilobits pe r second kg ki l o g ra m KHz kilohe r tz kV kilov olt lb pound LAN.
1-8 www .hp.com T echnical R efer ence Guide Intr oduction PC P er son a l c om pu t er PCA Printed circ uit assemb ly PCI peripher al component inter connect PCI - E PC I Ex p res s PCM puls e code m.
T echnical R efer ence Guide www .hp.com 1-9 Intr oduction S GRAM S y nc hr on ou s G r ap hic s RA M SIMD Single instruc tion multiple data SIMM single in -line memor y module SMAR T Self Monito r An.
1-10 www .hp.com T echni cal Re ference Guid e Intr oduction V AC V olt s a lt ern ati ng current VDC V olts direct c urrent VE SA Video Electr onic Standar ds Assoc iation V G A v ideo graphi cs adap.
T echnical R efer ence Guide www .hp.com 2-1 2 Sys t e m O ve r v i ew 2. 1 Introduction The HP Compaq dx7300 and dc7700 Series Bu siness Desktop Compute rs (Figure 2-1) deliver an outstanding combination of ma nageability , serviceab ility , and compatibility for enterprise en vironments.
2-2 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew 2.2 Fea tures The follo wing standa rd features are included on all series unless otherwise indicated: ■ Intel Pentium processor .
T echnical R efer ence Guide www .hp.com 2-3 S ystem Overvie w T able 2-1 shows the dif ferences in features between the different PC series based on form factor: NO TE S: [1] Supported o n s y ste m boar d . Req uires opti onal cable/br ack et assembl y .
2-4 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew 2.3 Mechanical Design This guide cov ers fiv e form factors: ■ Ultra-slim Desktop (USDT)—V ery slim design that can be used in a tradition desktop (horizontal) orientation or as a small to wer mounted in the supplied tower stand.
T echnical R efer ence Guide www .hp.com 2-5 S ystem Overvie w 2.3 . 1 Ca binet Lay o uts Fron t Vi ew s Figure 2-2 shows the front panel compone nts of the Ultra Slim Desktop (USDT) format factor .
2-6 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew Figure 2-3 shows the front panel compone nts of the Small Form F actor (SFF). and Slim T ower (ST) F igure 2 -3.
T echnical R efer ence Guide www .hp.com 2-7 S ystem Overvie w Figure 2-4 shows the front panel components of the microtower (uT) form f a ctor . F igure 2 - 4.
2-8 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew Figure 2-5 shows the front panel compone nts of the Con vertable Minito wer (CMT) form factor .
T echnical R efer ence Guide www .hp.com 2-9 S ystem Overvie w Rear Chas sis Connections T able 2-2 describe s the signal co nnections av a ilable on the rear pa nels of the dx7300 and dc7700 models. Note that not all connectors lis ted are provided on all form factors.
2-10 www .hp.com T echni cal Re ference Guid e Sys t e m O v e r vi ew 2.3.2 Ch as sis La y ou ts This section describes the internal layouts of th e chassis. For detailed information on servicing the chassis refer to the multimedia training and/ or the maintenance and service guide for these systems.
T echnical R efer enc e Guide www .hp.com 2-11 S ystem Overvie w Sm a l l Fo rm Fa c to r / Sl i m T ower C h a s s i s The chassis layouts for the Small F orm Factor (SFF) used for the HP Compaq dc7700 models and the Slim T ower (ST) used fo r the HP Comapq d x7300 models are sho wn in Figure 2-8.
2-12 www .hp.com T echni cal Re ference Guid e Sys t e m O v e r vi ew Micro to w er Chass is Figure 2-8 sho ws the layout for the Microtow er (MT) chassis used for the HP Compaq dx7300 models. Features include: ■ Externally accessible driv e bay assembly .
T echnical R efer enc e Guide www .hp.com 2-13 S ystem Overvie w Conv er tible M inito wer Figure 2-9 sho ws the layout for the Con vert i ble Minito wer (CMT) chassis in the minito wer confi guration used for HP Compaq dc7700 models.
2-14 www .hp.com T echni cal Re ference Guid e Sys t e m O v e r vi ew 2.3. 3 B oard Lay o uts Figures 2-10 throug h 2-12 sho w the system and ex pansion board layouts.
T echnical R efer enc e Guide www .hp.com 2-15 S ystem Overvie w NO TE: See SFF and S T re ar chas sis illustr ations for e xternally accessible I/O connec tors.
2-16 www .hp.com T echni cal Re ference Guid e Sys t e m O v e r vi ew NO TE S: See CMT rear c hassis illustration f or e xternally accessible I/O connectors . [1] Applicable to CMT c h assis onl y . [2] Not included on MT s ystem boar ds. F igure 2 -12 .
T echnical R efer enc e Guide www .hp.com 2-17 S ystem Overvie w 2.4 S ystem Architec ture The systems cov ered in this guide feature an architecture based on the Intel Q965 Express chipset (Figure 2-13). All systems cov ered in th is guide include the following k ey components: ■ Intel Pentium 4, Pentium D, or Core 2 Duo processor .
2-18 www .hp.com T echni cal Re ference Guid e Sys t e m O v e r vi ew F igur e 2 -13 . S y ste m Ar chit ectur e , Block di agram Parallel I/F [4] Pentium Processor Q965 Chipset Q965 82801 GMCH SDRAM Cntlr PCIe PEG I/F [1] PCI Express ICH8-DO SATA I/F USB I/F Ch A DDR2 SDRAM Ch B DDR2 SDRAM SCH5317 I/O Cntlr.
T echnical R efer enc e Guide www .hp.com 2-19 S ystem Overvie w 2.4. 1 Intel Processo r Sup por t The models cov ered in this guide s upport the follo wing processor types: ■ Intel Pentium Processo.
2-20 www .hp.com T echni cal Re ference Guid e Sys t e m O v e r vi ew ✎ The processor heatsink/fan assembly mounting di f fers between form factors.
T echnical R efer enc e Guide www .hp.com 2-21 S ystem Overvie w 2.4.3 Suppor t Components Input/output functions not pro vided by the chip set are handled b y other support components. Some of these components also provide “house k eeping” and v arious other functions as well.
2-2 2 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew 2.4.5 Ma ss St orag e All models support at least two mass storage de vices, with one being externally accessible for remo v able media.
T echnical R efer ence Guide www .hp.com 2-2 3 S ystem Overvie w 2.4.9 Gra phi c s Subsy s tem These systems use the Q965 GMCH component that integrates an inte grated graphics controller that can dri ve an e xternal VGA monitor . The in te grated graphics controller (IGC) features a 333-MHz core processor and a 400-MHz RAMD AC.
2-2 4 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew 2.5 Spec ifica tion s This section includes the en vironmental, electrica l, and physical specif ic ations for the system s cov ered in this guide. Where provided, metric statistics are gi ven in parenthesis.
T echnical R efer enc e Guide www .hp.com 2-2 5 S ystem Overvie w NO TE S: [1] S ystem w eight ma y vary dependin g on installed dr i ve s/per iph er als.
2-2 6 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew Ta b l e 2 - 1 0 Disk et te Driv e Spec ifications P arameter Mea surement Media T ype 3 .
T echnical R efer ence Guide www .hp.com 2-2 7 S ystem Overvie w NO TE: [1] IDE interface on USD T models (through SA T A bridge) Ta b l e 2 - 1 1 Optical Driv e Specifications P a ramet er 48x CD-ROM.
2-2 8 www .hp.com T echnical R efer ence Guide Sys t e m O v e r vi ew Ta b l e 2 - 1 2 Hard Driv e Spec ifications P arameter 80 GB 1 60 GB 25 0 GB D riv e S ize 3.
T echnical R efer ence Guide www .hp.com 3-1 3 Pr ocessor/Memory Subsy stem 3. 1 In troduction This chapter describes the proce ssor/memory subsystem. These sy stems include an Intel Celeron D, Pentium 4, Pentium D, or Core 2 Duo processor and the Q9 65 chipset (Figure 3-1).
3-2 www .hp.com T echnical R efer ence Guide Proces sor/Memor y Subsy stem 3.2 Intel P entium Proce ssors These systems each feature an Intel processor in a FC-LGA775 package mounted with a heat sink in a zero-insertion force socket. The moun ting socket allo ws the processor to be easily changed for upgrading.
T echnical R efer ence Guide www .hp.com 3-3 Processo r/ Mem or y S ubsystem Figure 3-2 illustrates the basic internal architect ure of an Intel Pentium single-core processor . Dual-core processors feature two cores opera ting in parallel. The table below prov ides a representati ve listing of supported processo rs.
3-4 www .hp.com T echnical R efer ence Guide Proces sor/Memor y Subsy stem 3.2.2 Processor Upgrad ing All models use the LGA775 ZIF (Sock et T) m ounting socket.
T echnical R efer ence Guide www .hp.com 3-5 Processo r/ Mem or y S ubsystem These systems support DIMMs with the following parameters: ■ Unb uf fered, compatible with SPD rev .
3-6 www .hp.com T echnical R efer ence Guide Proces sor/Memor y Subsy stem T able 3-1 sho ws suggested memory configurations for these systems. Note that the USDT form factor pro vides only three DIMM sockets and therefore can not match the SFF , ST , MT , and CMT form factors in maximum memory capacity .
T echnical R efer ence Guide www .hp.com 3-7 Processo r/ Mem or y S ubsystem The SPD address map is shown in T able 3-2. NO TE S: [1] Pr ogramme d as 1 28 b ytes by the DIMM OEM [2] Must be prog rammed t o 25 6 bytes.
3-8 www .hp.com T echnical R efer ence Guide Proces sor/Memor y Subsy stem F igure 3-3 sho ws the sy stem memory map . ✎ All locations in memory are cacheable. Base memo ry is always mapp ed to DRAM. The next 128 KB fi xed memory area can, through the north bridge, be mapped to DRAM or to PCI space.
T echnical R efer ence Guide www .hp.com 4-1 4 Sys t e m S u p p o r t 4. 1 Introduction This chapter cov ers subjects dealing with basic system architecture and covers the follo wing topics: ■ PCI b us ov ervie w (4.2), page 4-1 ■ System resources (4.
4-2 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t F igur e 4 -1. P CI Bus De vi ces and F unctions 4.2. 1 PCI 2.3 Bus O pera tion The PCI 2.3 b us consists of a 32-bit path (AD31-00 lines) that uses a multiple xed scheme for handling both address and data tran sfers.
T echnical R efer ence Guide www .hp.com 4-3 Sys t e m S u p p o r t Con figu rati on C y c les De vices on the PCI bu s must comply with PCI prot ocol that allo ws conf iguration of that device by softw are. In this system, configuration me chanism #1 (as described in the PCI Local Bus specification Re v .
4-4 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t T able 4-1 shows the standard conf iguration of device numbers and IDSEL connections for components and slots residing on a PCI 2.3 bus. NO TE S: [1] F uncti on not use d in these s ystems .
T echnical R efer ence Guide www .hp.com 4-5 Sys t e m S u p p o r t The reg ister inde x (CF8h, bits <7..2>) identif ies the 32-bit location w ithin the configuration space of the PCI de vice to be accessed.
4-6 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t NO TE: [1] SFF , S T , MT , and CMT form fact ors onl y . [2] CMT for m factor w ith PCI ex pansion boar d PCI b us arbitration is based on a round-ro bin sc heme that complies with the fairness algorithm specified b y the PCI specification.
T echnical R efer ence Guide www .hp.com 4-7 Sys t e m S u p p o r t Link La y e r The link layer provides data inte grity by adding a sequence informatio n prefix and a CRC suff ix to the packet created b y the transaction layer .
4-8 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t For a PCI Express x16 transfer , a lane will be re-used for the transfer of ev ery17th byte. The mux-demux process pro vided by the physical laye r is transparent to th e other layers and to software/dri vers.
T echnical R efer ence Guide www .hp.com 4-9 Sys t e m S u p p o r t 4.2.6 P CI Conn ectors PCI 2. 3 C onnec tor F igur e 4 -5 . 3 2 -bit , 5. 0 -volt P CI 2 .
4-10 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t PCI Expre ss C onnec tors F igur e 4 -6. P CI Expres s Bus Connec tors J31 (x1) and J41(x16) on s y stem boar d Ta b l e 4 - 6 .
T echnical R efer enc e Guide www .hp.com 4-11 Sys t e m S u p p o r t 4.3 S ystem Resource s This section describes the a vailability and basic control of major subsystems, otherwise kno wn as resource allocation or simply “s ystem resources.
4-12 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t 8259 M o d e The 8259 mode han dles interrupts IRQ0-IRQ15 in the le gacy (A T -system) method using 8259-equiv alent lo gic. T able 4-7 lists the standa rd source conf iguration for maskable interrupts and their priorities in 8259 mode.
T echnical R efer enc e Guide www .hp.com 4-13 Sys t e m S u p p o r t APIC Mode The Adv anced Programmable In te rrupt Controller (APIC) mode pro vides enhanced interrupt processing with the follo wi.
4-14 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t Maskable Interrupt processing is controlled and monito red through standard A T -type I/O-mapped registers. These re gisters are listed in T able 4-8. The initialization and operation of the interrupt control regist ers follows st andard A T -type protocol.
T echnical R efer enc e Guide www .hp.com 4-15 Sys t e m S u p p o r t The NMI Status Register at I/O port 061h contains NMI source and status data as follo ws: NMI Status Register 61h F uncti ons not.
4-16 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t 4.3.2 Dir ec t Memor y Access Direct Memory Access (DMA) is a method by wh ich a de vice accesses system memory without in volving the microprocessor .
T echnical R efer enc e Guide www .hp.com 4-17 Sys t e m S u p p o r t DMA P ag e Regis ters The DMA page register contains the eight most si gnif icant bits of the 24-bit address and w orks in conjunction with the DMA controllers to def ine the complete (24-bit) address for the DMA channels.
4-18 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t The remaining address lines are in an undefined state during the refresh c y cle. The refresh operations are driv en by a 69.799-KHz clock generated by Interv al T imer 1 , Counter 1.
T echnical R efer enc e Guide www .hp.com 4-19 Sys t e m S u p p o r t 4.4 Real- Time C l ock an d C onfiguration Memor y The Real-time clock (R TC) and conf iguration me mory (also referred to as “CMOS”) functions are provided b y the 82801 component and is MC 146818-compatible.
4-20 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t 4.4.2 Standard CMOS Locations T able 4-12 describes standard conf iguration me mory locations 0Ah-3 Fh. These locations are accessible through using OUT/IN as sembly language instructions using p ort 70/71h or BIOS function INT15, AX=E823h.
T echnical R efer enc e Guide www .hp.com 4-21 Sys t e m S u p p o r t Po we r - O n / S e t u p Pa s swo r d These systems inclu de a power -on an d setup passwords, which m ay be enabled or disab led (cleared) through a jumper on the system board. The jumper controls a GPIO input to the 82 801 ICH8 that is checked during POST .
4-2 2 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t Level 0— Co ver remo val indication is essentially disabled at this lev el. During POST , status bit is cleared and no oth er action is taken by BIOS .
T echnical R efer ence Guide www .hp.com 4-2 3 Sys t e m S u p p o r t 4.5 .3 S ystem Sta tus These systems provide a visual indication of sy stem boot, R OM flash, and operational status through the power LED and internal speaker , as de scribed in T able 13.
4-2 4 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t 4.6 Register M ap an d Mi scellan eous Func tions This section contains the syst em I/O map and information on general-purpose functions of the ICH8 and I/O controller . 4.6. 1 Sy stem I/O Ma p T able 4-14 lists the f ixed addresses of the input/output (I/O) ports.
T echnical R efer enc e Guide www .hp.com 4-2 5 Sys t e m S u p p o r t 4.6.2 SCH5 3 1 7 I/O C ontroller Func tions The SCH5317 I /O controller contains v arious func tions such as the ke yb oard/mouse interfaces, diskette interface, serial interfaces, and parallel interf ace.
4-2 6 www .hp.com T echnical R efer ence Guide Sys t e m S u p p o r t The conf iguration reg isters are accessed through I/O registers 2Eh (index) and 2Fh (data) af ter the conf iguration phase has been activ ated by wr iting 55h to I/O port 2Eh.
T echnical R efer ence Guide www .hp.com 5-1 5 Inp ut/O u tpu t Inter faces 5 . 1 In troduction This chapter describes the standard (i.e., system board) interfaces that pro vide input and output (I/O) porting of data and specif ically discusses in terfaces that are controlled through I/O-mapped registers.
5-2 www .hp.com T echnical R efer ence Guide Input/Output In terfaces S A T A Configuration Registers The SA T A controller is configured as a PC I device with b us mastering capability . The PCI confi guration registers for the SA T A controller function (PCI de vice #31, function #2) are listed in T able 5-1.
T echnical R efer ence Guide www .hp.com 5-3 Input/Output Int erfaces 5 .2.2 S A T A C onnector The 7-pin SA T A connector is shown in the figure belo w .
5-4 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5 .3 Disk ette Driv e Interface The MT and CMT form factors support a diskette dri ve through a standard 34-pin diskette dri ve connector . Selected models come standard with a 3.5-inch 1.
T echnical R efer ence Guide www .hp.com 5-5 Input/Output Int erfaces The diskette dr i ve I/F conf iguration regi sters are listed in the following table: For detailed conf iguration register information refer to the SMSC data sheet for the SCH5317 I/O component.
5-6 www .hp.com T echnical R efer ence Guide Input/Output In terfaces Disk et te Driv e Inter face Control The BIOS functi on INT 13 pro vides basic control of the diskette dri ve interface. The disk ette driv e interface can be controlled by softw are th rough the SCH5317's I/O-mapped re gisters listed in T able 5-5.
T echnical R efer ence Guide www .hp.com 5-7 Input/Output Int erfaces NO TE: The mos t recently w ritten data r ate value to e ither D RSR or C CR will be in effec t .
5-8 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5 .3.2 Disk et te Driv e Connec tor The SFF , ST , MT , and CMT form factors use a stan dard 34-pin connector for diskette dri ves (refer to Figure 5-2 and T able 5-6 for the pinout ).
T echnical R efer ence Guide www .hp.com 5-9 Input/Output Int erfaces 5. 4 S e r i a l I n t e r f a c e Systems cov ered in this guide ma y include one RS-232-C type seri al interface to transmit and receiv e asynchronous serial data with external de vices.
5-10 www .hp.com T echnical R efer ence Guide Input/Output In terfaces The serial interface configuration re gist ers are listed in the following table: Serial Inter face Con trol The BIOS function INT 14 provides basic control of the serial interface.
T echnical R efer enc e Guide www .hp.com 5-11 Input/Output Int erfaces 5. 5 Par a l l e l I n t e r fa c e Systems cov ered in this guide may include a para llel interface for connection to a periphe ral de vice with a compatible interf ace, the most common being a printer .
5-12 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5. 5. 3 E x t e n d e d C a p a b i l i t i e s Po r t M o d e The Extended Capabilities Port (ECP) mode, like EPP , also uses a hardware protocol-based design that supports transfe rs up to 2 MB/s.
T echnical R efer enc e Guide www .hp.com 5-13 Input/Output Int erfaces P arallel Interface C ontrol The BIOS functi on INT 17 pro vid es simplified control of the pa rallel interface. Basic functions such as initialization, character printing, and pr inter status are pro vide by subfunctions of INT 17.
5-14 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5. 5. 5 Par a l l e l I n t e r f a c e C o n n e c t o r Figure 5-4 and T able 5-12 sho w the connector and p inout of the parallel interf ace connector . Note that some signals are redef ined depending on the port's operational mode.
T echnical R efer enc e Guide www .hp.com 5-15 Input/Output Int erfaces 5 .6 K e yboar d/P ointing De vice Inter face The ke yboard/pointing dev ice interface functio n is provided b y the SCH5317 I/O.
5-16 www .hp.com T echnical R efer ence Guide Input/Output In terfaces T able 5-13 lists and describes commands th at ca n be issued by the 8042 to the ke yboard. T able 5- 1 3. 8042- T o -Ke yboard Comm an ds Comman d V alue Desc ription Set/R eset St atus Indicat ors EDh Enables LED indi cators .
T echnical R efer enc e Guide www .hp.com 5-17 Input/Output Int erfaces Note: [1] Used in Mode 3 onl y . 5 .6.2 P ointing De vice Inter face O peration The pointing de vice (typically a mouse) connects to a 6-pin DIN-type connector that is identical to the ke yboard connector both p hysically and electrically .
5-18 www .hp.com T echnical R efer ence Guide Input/Output In terfaces The keyboard interface configuration regi sters are listed in the follo wing table: 804 2 C on trol The BIOS function INT 16 is ty pically used for controlling in teraction with the ke yboard.
T echnical R efer enc e Guide www .hp.com 5-19 Input/Output Int erfaces I/O P ort 64h I/O port 64h is used for reading the status re gi ster and for writing commands.
5-20 www .hp.com T echnical R efer ence Guide Input/Output In terfaces A9h T est the clock and data lines of the po inting de v ice interface and place te st r esults in the output buffe r .
T echnical R efer enc e Guide www .hp.com 5-21 Input/Output Int erfaces 5 .6.4 K e yboard/P ointing D e vice Interface Conn ec tor The legac y-light model provides separate PS/2 connectors for the keyboard and pointin g device. Both connectors are identical both physically and electrically .
5-2 2 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5 .7 U niv ersal Serial B us Inter face The Univ ersal Serial Bus (USB) interface provides asynchronous/isochronous data transfers wi th compatible pe ripherals su ch as ke yboards, pr inters, or modems.
T echnical R efer ence Guide www .hp.com 5-2 3 Input/Output Int erfaces 5 .7 . 1 USB Data Forma ts The USB I/F uses non-return-to-ze ro in verted (NRZI) encoding for data transmissions, in which a 1 is represented by no change (between bit tim es) in signal le vel and a 0 is represented by a change in signal le vel.
5-2 4 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5. 7 . 2 U S B P r o g r a m m i n g Programming the USB interface cons ists of conf iguration, which typically occurs during POST , and control, which occurs at runtime.
T echnical R efer enc e Guide www .hp.com 5-2 5 Input/Output Int erfaces USB Co ntrol The USB is contr o lled through I/O re gisters as listed in table 5-19. 5 .7 .3 USB Conn ec tor These systems provide type-A USB ports as sho w n in Figure 5-9 below .
5-2 6 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5 .7 .4 U SB C abl e Da ta The recommended cable length between the host an d the USB device should be no longer than sixteen feet for full-channel (12 MB/s) opera tion, depend ing on cable specif ication (see follo wing table).
T echnical R efer ence Guide www .hp.com 5-2 7 Input/Output Int erfaces 5. 8 A u d i o S u b s ys t e m These systems use the HD audio controller of the 82801 component to access and control a Realtek ALC262 HD Audio Codec, which pro vides 2-channel high def inition analog-to-d igital (ADC) and digital-to-analog (D A C) con versions.
5-2 8 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5 .8. 1 HD Au dio Controller The HD Audio Controller is a PC I Express devi ce that is inte grated into the 82801 ICH component .
T echnical R efer ence Guide www .hp.com 5-2 9 Input/Output Int erfaces 5 .8.3 HD Audio C odec The HD Audio Codec p rovides pulse code modulat ion (PCM) coding and decoding of audio information as well as the selectio n and/or mixing of analog channels.
5-30 www .hp .com T echnical R efer ence Guide Input/Output In terfaces 5 .8.4 Audio Progr ammin g Audio subsystem pr ogramming consists of conf ig uration, typically accom plished during POST , and control, which occurs during runtime.
T echnical R efer enc e Guide www .hp.com 5-31 Input/Output Int erfaces Audio C ontrol The audio subsystem is co ntrolled through a set of verb commands listed in T able 5-23. NOTE: Refer to vendor data sheet for more informa tion. Get Converter Format T able 5- 2 3.
5-3 2 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5 .8.5 Au dio Specif ica tions The specifications for the HD Audio subsystem are listed in T able 5-24. NO TE: [1] Device dri ver limitation: 48 KHz T able 5- 2 4. HD Audio Subsy stem S pecifications P ara mete r Measu remen t Sampl ing Rates: DAC ADC 44.
T echnical R efer ence Guide www .hp.com 5-3 3 Input/Output Int erfaces 5 .9 N et work Interface C ontro ller These systems pro vide 10/100/1000 M bps network support through an In tel 82566 netwo rk interface controller (NIC), a PHY component, and a RJ-45 jack with integral status LEDs.
5-34 www .hp .com T echnical R efer ence Guide Input/Output In terfaces 5. 9 . 1 W a ke - O n - L A N S u p p o r t The NIC supports the W ired-for -Management (WfM) standard of W ake-On-LAN (WOL) that allo ws the system to be booted up from a po wered-down or lo w-power condition upon the detection of special packets recei ved ov er a netw ork.
T echnical R efer ence Guide www .hp.com 5-3 5 Input/Output Int erfaces 5. 9 . 4 N I C P ro g r a m m i n g Programming the NIC consists of conf ig uration, which occurs during POST , and co ntrol, which occurs at runtime. The Intel 82566 NIC is conf igured as a PCI de vice and controlled through registers mapped in v ariable I/O space.
5-3 6 www .hp.com T echnical R efer ence Guide Input/Output In terfaces 5. 9 . 6 N I C S p e c i f i c a t i o n s T abl e 5- 25. NIC Sp ecific atio ns Pa r a m e t e r Modes Su pported 1 0B ASE -T ha.
T echnical R efer ence Guide www .hp.com 6-1 6 Integrated G rap hic s Su bsy s tem 6. 1 In troduction This chapter describes graphics subsystem that is inte grated into the Q965 GMCH component. This graphics subsystem employs the use of syst em memory to pro vide ef ficient, ec onomical 2D and 3D performance.
6-2 www .hp.com T echnical R efer ence Guide Integrated Gr aphics Subs ystem 6.2 F unc tion al D esc ription The Intel Q965 GMCH component includes an Intel Integrated Graphics Media Accelerator 3000 controller (Figure 6-1).
T echnical R efer ence Guide www .hp.com 6-3 Integrated Gr aphics Subs ystem The IGC includes 2D and 3D accelerator engines wo rking with a deeply-pipe lined pre-processor . Hardware cursor and ov e rlay generators are also included as well as a legacy V GA processor core.
6-4 www .hp.com T echnical R efer ence Guide Integrated Gr aphics Subs ystem The Microsoft Direct diagnostic tool included in most versions of W indows may be used to check the amount of video memory being used. Th e Display tab of the u tility the “ A pprox.
T echnical R efer ence Guide www .hp.com 6-5 Integrated Gr aphics Subs ystem 6 .4 Up gradi n g Graphics The PCI-E x16 slot of SFF , ST , MT , and CMT systems can accept a normal-layout Advanced Digital Display 2 (ADD2) or a full-size PCIe x1 6 graphics controlle r card.
6-6 www .hp.com T echnical R efer ence Guide Integrated Gr aphics Subs ystem 6.5 V GA Monitor Conn ec tor These systems includes a standard V GA connector (Figure 6-3) for attaching an anal og monitor: F igure 6 3 . D B-15 V G A Monitor Connector , (as vie wed fr om r ear of chassis).
T echnical R efer ence Guide www .hp.com 7-1 7 P o w er and Sign al Dis tribu tion 7 . 1 Introduc tion This chapter describes the po wer supply an d method of general po wer and signal distrib ution. T opics cov e red in this chapter include: ■ Po wer supply assembly/c ontrol (7.
7-2 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution 7 .2. 1 P o wer Supply Assembly These systems feature power supplies with po wer factor-correction logic.
T echnical R efer ence Guide www .hp.com 7-3 P ow er and Signal Distr ibution T able 7-3 lists the specif i cations for the 365-wa tt po wer supply used in the MT and CMT form fac to rs NO TES: T otal continuous output p ow er should not exceed 36 5 watts.
7-4 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution 7. 2 . 2 P o w e r C o n t r o l The po wer supply assembly is controlled digitally by the PS On signal (Figure 7-1). When PS On is asserted, the Po wer Supply Assembly is acti v ated and all voltage outp uts are produced.
T echnical R efer ence Guide www .hp.com 7-5 P ow er and Signal Distr ibution P o wer LED Indica tions A dual-color LED lo cated on the front panel (bez el) is used to indic ate system power status.
7-6 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution The wake up sequence for each ev ent occurs as follows: Wa k e - O n - L A N The network interface controller (NIC) can be c onf igured for detection of a “Magic Packet” and wake the system up from sleep m ode through the assertion of the PME- signal on the PCI bus.
T echnical R efer ence Guide www .hp.com 7-7 P ow er and Signal Distr ibution 7 .2. 3 P o w er Manageme nt These systems include po wer management func tions designed to conserve ener gy . These functions are provided b y a combination of hardware, f irmware (BIOS) and software.
7-8 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution 7. 3 P o w e r D i s t r i b u t i o n The po wer supply assembly includ es a multi-connector cable assembly that routes +3.3 VDC, +5 VDC, +5 VDC STB, +12 VC, and -12 VDC to the system board as well as to the individual dri ve assemblies.
T echnical R efer ence Guide www .hp.com 7-9 P ow er and Signal Distr ibution Figure 7-3 sho ws the po wer supply cabling for the SFF/ST systems. Conn ecto rs no t sho wn to s cale .
7-10 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution Figure 7-4 shows the po wer supply cabling fo r the microtower and con vertible minito wer systems. NO TES: Conn ecto rs no t sho wn to s cale . All + an d - values ar e VDC.
T echnical R efer enc e Guide www .hp.com 7-11 P ow er and Signal Distr ibution 7 .4 Si gnal Dis tribu tion Figures 7-5 through 7-7 show general signal distribution between the main subassem blies of the system units. NO TE S: See F igur e 7 - 1 0 for header pino ut .
7-12 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution NO TE S: See F igur e 7 -8 for header p inout . F igur e 7 -6. SFF / S T F orm F actor Signal Distr ibution Diagr am P8 +12 VccP Power LED P1 Power P6 P5 P3 Supply Assembly +3.
T echnical R efer enc e Guide www .hp.com 7-13 P ow er and Signal Distr ibution F igure 7 -7 . MT / CMT For m F actor Signal Distribution Di agram P8 +12 VccP Power LED SA T A I/F .
7-14 www .hp.com T echnical R efer ence Guide P ower and Si gnal Distribution NO TE: No polar it y considerati on requir ed for connec tion to speak er header P6 .
T echnical R efer ence Guide www .hp.com 8-1 8 BIO S R O M 8. 1 Introduction The Basic Input/Output System (BIOS) of the computer is a collectio n of machine la nguage programs stored as firmw are in read-only memory (ROM).
8-2 www .hp.com T echnical R efer ence Guide BIOS R OM 8.2 ROM Flashin g The system BIOS f irmware is contained in a fl ash R OM device that can be re-written with ne w BIOS code using a flash utility locally (with F10 setup), with the HP QFlash program in a W indows en vironment, or with the FLASHBIN.
T echnical R efer ence Guide www .hp.com 8-3 BIO S ROM 8.2.2 C han geab l e Sp la sh Sc reen ✎ A corrupted splash screen may be restored b y reflashing the BIOS image through F10 setu p, running HPQFlash, or running FLASHBIN.E XE. Depending on the sys tem, changin g (customizing) the splash screen may only be a vailable with asistance from HP .
8-4 www .hp.com T echnical R efer ence Guide BIOS R OM 8.3.2 Net w ork Boot (F1 2) Su ppor t The BIOS support s booting the sy stem to a network server . The fu nction is acc essed by pressing the F12 ke y when prompted at the lo wer right hand corner of the display d uring POST .
T echnical R efer ence Guide www .hp.com 8-5 BIO S ROM 8.3. 4 B oot Error Codes The BIOS provides visual and audible indications of a f a iled system boot by using the system’ s po wer LED and the system board speak er . The e rror conditions are listed in the follo wing table.
8-6 www .hp.com T echnical R efer ence Guide BIOS R OM 8.4 Setup Utilit y The Setup utility (stored in R OM) allo ws the user to configure syst em functions in volving security , power management, and system resources. The Setup utility is R OM-based and in vok e d when the F1 0 ke y is pressed and held during the computer boot c ycle.
T echnical R efer ence Guide www .hp.com 8-7 BIO S ROM Fi l e (continued) Igno r e Change s and Ex it Exits Compu ter Setu p w ithout appl ying or sa v i ng any c hanges. Sav e Changes and Ex it Sav es c h anges to s yst em conf igur ation or def ault settings and ex its Comput er Set up.
8-8 www .hp.com T echnical R efer ence Guide BIOS R OM Sto rag e (continued) T ransfer M ode Spec ifie s mode used fo r data transf er .. Options (subjec t to de v ice capabili ties) ar e Max UDMA (default), PIO 0, Max PIO , Enhanced DMA, and Ultr a DMA 0.
T echnical R efer ence Guide www .hp.com 8-9 BIO S ROM Sto rag e (continued) IDE C ontr oll er Allo ws y ou to enable or disable the pr imar y IDE controlle r . This featur e is supported on select models onl y . Primary SA T A Controller Allo ws y ou to enable or disable the Pr imar y S A T A contr oller .
8-10 www .hp.com T echnical R efer ence Guide BIOS R OM Secur it y (continued) Pa s s w o r d O p t i o n s (Thi s selec tion w ill appear only if a po w er -on passwor d i s set.) Allo ws y ou to spec ify whether the pass wo rd is requir ed for w arm boot ( CTRL+AL T +DEL ).
T echnical R efer enc e Guide www .hp.com 8-11 BIO S ROM Secur it y (continued) Dr i veL ock Sec uri ty Allo ws y ou to a ssign or modify a mas ter or u ser pa ssw or d f or hard dri ve s that support the A T A sec urity command set .
8-12 www .hp.com T echnical R efer ence Guide BIOS R OM Advan c ed * *F or adv anced users on ly P ower - On Op tions Allow s you to set: • PO ST mode (Quic kB oot , F ullBo ot , or FullBoot ev ery 1 -30 days ). • PO S T messages (e nable/disable).
T echnical R efer enc e Guide www .hp.com 8-13 BIO S ROM Advan c ed * (continued) *F or adv anced users on ly Po w e r - O n O p t i o n s (continued) Allo ws y ou to set: (continued) • A CPI/USB B u ffer s @ T op of Memory (enable/disable). Enabling this featur e places USB memory buffers at the top of me mor y .
8-14 www .hp.com T echnical R efer ence Guide BIOS R OM Advan c ed * (continued) *F or adv anced users on ly Dev ice options Allow s you to s et: • Pr int er mode (b i-dir ectional , EPP & E CP , output o nly). • Num Lo ck state at po wer - on (off/on).
T echnical R efer enc e Guide www .hp.com 8-15 BIO S ROM 8. 5 Client Management F unctio ns T able 8-3 provides a partial list of the client management BIOS functions sup ported by the systems cov ered in this guide. These functions , designed to support intelligent manageability applications, are Compaq-specif i c unless othe rw ise indicated.
8-16 www .hp.com T echnical R efer ence Guide BIOS R OM 8.5 . 1 S ystem ID an d ROM T ype Diagnostic applications can use the INT 15, AX= E800h BIOS functio n to identify the type of system. This function will return the system ID in the BX re gister .
T echnical R efer enc e Guide www .hp.com 8-17 BIO S ROM 8.6 SMB IOS In support of the DMI specif ication the PnP func tions 50h and 51h are used to retrie ve the SMBIOS data. Function 50h retrie ves the number of structures, size of the largest structure, and SMBIOS v ersion.
8-18 www .hp.com T echnical R efer ence Guide BIOS R OM.
T echnical R efer ence Guide www .hp.com A-1 A Err or Mess a ges an d Cod es A . 1 Introduc tion This appendix lists the error co des and a brief d escription of the probable cause of the error . ✎ Errors listed in this appendix are applicable only for systems running HP/Compaq BIOS .
A-2 www .hp.com T echnical R efer ence Guide Err or Messages and Codes A.3 P ow er- O n Self T est (P OST) Mess ag es Ta b l e A -2 . P ow er-On Self T est (P OST) Message s Error Message Pr obable Cause Inv alid Electroni c Seri al Number Chassis ser ial num ber is corrupt .
T echnical R efer ence Guide www .hp.com A-3 Err or Messages and Codes 5 1 4 -CPU or Chassis Fan not detec ted. CP U fan is no t connected o r may ha ve malfuncti oned. 60 1 - D i s ke t t e Co n t rol l e r E r ror D i s ke t t e d rive rem ove d si n c e p re vio u s b oo t.
A-4 www .hp.com T echnical R efer ence Guide Err or Messages and Codes 1 80 1 -Mic rocode P atch Err or A processor is installed for whic h the BIOS R OM has no patc h. Check for ROM up d at e. Inv alid Electr onic Ser ial Number Electroni c serial number has become cor rupt ed.
T echnical R efer ence Guide www .hp.com A-5 Err or Messages and Codes A.4 S y stem E rr or Me ssages ( 1x x - xx) NO TES: [1] 1 02 mes sage code may be caused by one of a var iet y of pr ocessor -related problems that may be sol ved by r eplacing the proces sor , although sy stem board replacement may be needed .
A-6 www .hp.com T echnical R efer ence Guide Err or Messages and Codes A.5 Memory Err or Me ssa ges (2xx - xx) Ta b l e A - 4 . Memo ry Err or Me ssages Message Probable Cau se 200 -04 Real memory siz.
T echnical R efer ence Guide www .hp.com A-7 Err or Messages and Codes A. 6 K e yboar d Error Mess ag es (30x - xx) 21 1 -0 2 Er r or while sa ving memory during r a ndom memory pat tern tes t 21 1 -0.
A-8 www .hp.com T echnical R efer ence Guide Err or Messages and Codes A. 7 Printer Error Messag es (4xx - xx) A.8 V ideo ( G raph ics) Er ro r Message s (5xx - xx ) See T able A - 1 4 for additional v ideo (graphic s) message s.
T echnical R efer ence Guide www .hp.com A-9 Err or Messages and Codes A .9 Disk et te Driv e Error Mess ag es (6xx - xx) 600 -xx = Diskette dri ve ID test 609- x x = Diskette driv e re set controller test 60 1 -xx = Diskette dri ve format 6 1 0 -xx = Diskette driv e change l ine test 60 2 - xx = Disk ette read test 6 1 1 -xx = Pr i.
A-10 www .hp.com T echnical R efer ence Guide Err or Messages and Codes A. 1 0 S erial Inter face Error Mes sa ges ( 1 1xx - xx) Ta b l e A - 9. Serial Inter face Err or Messages Message Prob able Cause Message Pro bable Cause 1 1 0 1 -0 1 UAR T DL AB bit failur e 1 1 0 1 - 1 3 UAR T cntrl .
T echnical R efer enc e Guide www .hp.com A-11 Err or Messages and Codes A . 1 1 Modem Comm unica tions Error Mess ag es ( 1 2xx - xx) Ta b l e A - 1 0 .
A-12 www .hp.com T echnical R efer ence Guide Err or Messages and Codes NO TE S: [1] Local loopback mode [4] Modem auto ori ginate test [2] Analog loopback originate mode [5] Modem auto ans wer t est [3] Analog loopback answ er mode [6] Modem direct connect te st A.
T echnical R efer enc e Guide www .hp.com A-13 Err or Messages and Codes A. 1 3 Har d D ri v e Er r or Mes sages ( 1 7xx - xx ) Ta b l e A - 1 2 Hard Drive Error Mess ag es Message Probable Cause Message Probable Cause 1 7xx-0 1 Exceeded max . soft err or lim it 1 7xx -5 1 F ailed I/O r ead test 1 7xx-0 2 Exceeded max.
A-14 www .hp.com T echnical R efer ence Guide Err or Messages and Codes NO TE: xx = 00, Hard dr ive ID test xx = 1 9 , Hard dr ive po we r mode test xx = 0 1 , Hard dr i ve f ormat test xx = 20, SMART.
T echnical R efer enc e Guide www .hp.com A-15 Err or Messages and Codes A . 1 4 H ard Driv e Error M es s a g es ( 1 9xx - xx ) 1 900-xx = T ape ID test f ailed 1 904-xx = T ape BO T/EO T test failed.
A-16 www .hp.com T echnical R efer ence Guide Err or Messages and Codes A. 1 5 V ideo (Graph ics) Er ro r Message s (2 4x x - xx) A. 1 6 Audio Err or M essa g es (3 206 - xx) Ta b l e A - 1 4 Video (G.
T echnical R efer enc e Guide www .hp.com A-17 Err or Messages and Codes A. 1 7 D VD /C D-R OM E rr or Message s ( 3 3xx - xx) A. 1 8 Netw or k Int erfac e Er ro r Message s (6 0x x - xx) T able A- 1 .
A-18 www .hp.com T echnical R efer ence Guide Err or Messages and Codes A. 1 9 SC SI Interface Err or Messag es (6 5xx - xx, 6 6xx - xx, 6 7xx - xx) n = 5, Har d dri ve = 6, CD-ROM dr iv e = 7 , Tape .
T echnical R efer enc e Guide www .hp.com A-19 Err or Messages and Codes A.20 P ointin g De vice Inter face Err or Mess ag es (8 60 1 - xx) Ta b l e A - 1 9 P ointin g Dev i ce Interface Error Messag .
A-20 www .hp.com T echnical R efer ence Guide Err or Messages and Codes.
T echnical R efer ence Guide www .hp.com B-1 B ASCII C harac ter Set B. 1 Introduction This appendix lists, in T able B-1, the 256-char acter AS CII code set in cluding the decimal and hexadecimal v alues.
B-2 www .hp.com T echnical R efer ence Guide AS CII Character Set 18 12 × 5 0 3 2 2 8 2 5 2 R 1 14 7 2 r 19 13 ! ! 51 3 3 3 8 3 5 3 S 1 15 7 3 s 20 1 4 ¶ 5 2 3 4 4 84 5 4 T 1 16 74 t 21 15 § 5 3 3 .
T echnical R efer ence Guide www .hp.com B-3 ASCI I C ha rac ter S et NO TES: [1] S ymbol not displa yed. Keys t ro ke G u i d e : Dec # Key st ro ke ( s ) 0C t r l 2 1 - 2 6 Ctrl A t hru Z res pe ct .
B-4 www .hp.com T echnical R efer ence Guide AS CII Character Set.
T echnical R efer ence Guide www .hp.com C-1 C Key b o a r d C . 1 Introduction This appendix describes the HP ke yboard that is included as stan dard with the system unit.
C-2 www .hp.com T echnical Re ference Guid e Key b o a r d F igure C-1. K ey strok e Processing Elements , B lock Diagr am When the system is turned on, the keyboard pr ocessor generates a Po wer-On Reset (POR) signal after a period of 150 ms to 2 seconds.
T echnical R efer ence Guide www .hp.com C-3 Key b o a r d C . 2. 1 PS/ 2 -T ype Ke ybo a rd Trans mi s si o ns The PS/2-type ke yboard sends two main types of da ta to the system; comman ds (or responses to system commands) and ke ystroke scan codes.
C-4 www .hp.com T echnical Re ference Guid e Key b o a r d C .2.2 USB-T ype K e yboard T ransmissi ons The USB-type keyboard sends es sentially the same information to the system that the PS/2 ke yboa.
T echnical R efer ence Guide www .hp.com C-5 Key b o a r d C.2. 3.2 Wi ndo ws Enhanc ed K e yb oard s F igur e C-5 . U. S. English W indow s (101W-K ey) K ey boar d Ke y P ositions F igur e C-6.
C-6 www .hp.com T echnical Re ference Guid e Key b o a r d C .2.3.3 E asy Acc ess Ke yboard The Easy Access keyboard is a W indo ws Enhanced -type ke yboard that includes special buttons allo wing quick internet navigation. The Easy Access Keyboard uses the PS/2-type connection.
T echnical R efer ence Guide www .hp.com C-7 Key b o a r d C.2 .4 K e y s All ke ys generate a Make code (when pressed) and a Break co de (when released) with the exception of the Pau s e ke y (pos.
C-8 www .hp.com T echnical Re ference Guid e Key b o a r d Alt —The Alt keys (pos. 93 /95) can be used in conju n ction with the same ke ys av ailable for use with the Ctr l ke ys with the exception that position 14 ( Sys R q ) is a v ailable instead of position 16 ( Break ).
T echnical R efer ence Guide www .hp.com C-9 Key b o a r d C.2 .4 .4 Eas y A cce ss K e y st ro k es The Easy Access ke yboards(Figures C-7) include additional keys (also re ferred to as buttons) used to streamline internet access and navigation.
C-10 www .hp. com T echnical R efer ence Guide Key b o a r d C. 2.5 K e yboard Comman ds T able C-1 lists the commands that the ke yboard can send to the system (specifically , to the 8042-type logic). Note: [1] Modes 2 and 3 . [2] Mode 1 only . Ta b l e C - 1 .
T echnical R efer enc e Guide www .hp.com C-11 Key b o a r d C.2 .6 Sc an Cod e s The scan codes generated b y the ke yboard processo r are determined by the mode the k eyboard is operating in. ■ Mode 1: In Mode 1 operation, the k eyb oard generates scan codes compatible with 8088-/8086-based systems.
C-12 www .hp. com T echnical R efer ence Guide Key b o a r d 1 4 Print Sc rn E0 2A E0 3 7/E0 B7 E0 AA E0 3 7 /E0 B7 [1] [2] 54/ 84 [ 3 ] E0 2A E0 7C/E0 F0 7C E0 F0 1 2 E0 7C/E0 F0 7C [1] [2] 84/ F0 84.
T echnical R efer enc e Guide www .hp.com C-13 Key b o a r d 3 5 Num Loc k 4 5 /C5 77/F0 77 7 6/na 36 / E 0 35 / E 0 B 5 E0 AA E0 3 5/E0 B5 E0 2A [1] E0 4A/E0 F0 4A E0 F0 1 2 E0 4A/E0 F0 4A E0 1 2 [1].
C-14 www .hp. com T echnical R efer ence Guide Key b o a r d 5 8 + 4E/CE [6] 7 9/F0 7 9 [6] 7C/F0 7C 5 9 Caps L ock 3A/B A 58/F0 5 8 1 4/F0 1 4 60 A 1E/ 9E 1C/F0 1C 1C/F0 1C 6 1 S 1F/9F 1B/F0 1B 1B/F0.
T echnical R efer enc e Guide www .hp.com C-15 Key b o a r d 8 5 / 35/B5 4A/F0 4A 4A/F0 4A 86 S h i f t ( r i g h t ) 36 / B 6 59 / F 0 59 59 / F 0 59 87 E 0 4 8 / E 0 C 8 E0 AA E0 48/E0 C8 E0 2A [4] .
C-16 www .hp. com T echnical R efer ence Guide Key b o a r d All codes assume Shift, C trl, and Alt k eys inacti ve unless otherwise noted . NA = Not applicable [1] Shift (left) k ey acti ve. [2] Ctr l k ey ac tive . [3] Alt k ey acti ve. [4] Left Shift k ey acti ve.
T echnical R efer enc e Guide www .hp.com C-17 Key b o a r d C. 3 C on ne cto r s T wo types o f ke yboard interfaces may be used in HP/Compaq systems: PS/2-type and US B-type. System units that provide a PS/2 connector will ship with a PS/2-type keyboard b ut may also support simultaneous connection of a USB ke yboard.
C-18 www .hp. com T echnical R efer ence Guide Key b o a r d.
T echnical R efer ence Guide www .hp.com Index -1 Ind e x Numerics 8259 Mode 4-12 A Advanced Digital Display (ADD2) 6-2 APIC Mode 4-13 audible (beep) indications 4-23 audio codec 5-32 Audio Specificat.
Index -2 w ww .hp.com T echni cal Re fer ence Guide Index serial interface 5-9 Serial Interface Connector 5-9 serial number 1-3 Setup utility 8-6 Smart Cover Lock 4-22 Smart (hood) Cover Sensor 2-2, 4.
An important point after buying a device HP (Hewlett-Packard) dx7300 (or even before the purchase) is to read its user manual. We should do this for several simple reasons:
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