Instruction/ maintenance manual of the product UG078 Xilinx
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R Virtex-4 LX/SX Prototype Platform User Guide UG078 (v1 .2) May 2 4, 2006 P/N 040 2226-06.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com UG078 (v 1.2) Ma y 24, 2006 Xilinx is d isclosi ng this Doc ument and Intellectu al Proper ty (hereina fter “the D esign”) to y ou for use i n the deve lopment of de signs t o operat e on, or interface with Xili nx FPGAs.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 3 UG078 (v 1.2) May 24, 20 06 Preface: About This Guide Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Additional Reso urces .
4 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 R.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 5 UG078 (v 1.2) May 24, 20 06 R Preface About This Guide This user g uide desc rib es the fea tures and operation of the Virtex™-4 prot o type platfo rm and de scr ibes ho w to confi gure ch ains of F PGAs and seri al PROMs.
6 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Preface : About This Guide R Online Docu ment The following conventions are used in this document: Italic font Varia bles.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 7 UG078 (v 1.2) May 24, 20 06 R Virtex-4 LX/SX Prototype Platfo rm Package Conten ts • Xilinx Virtex™-4 proto t ype platfo rm board • User guide.
8 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Introduction R Features • Independent power supply jacks fo r VCCINT , VCCO, and VCCAUX • Selectable VCCO-enable pin .
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 9 UG078 (v 1.2) May 24, 20 06 Introduction R Figure 1 shows a bl ock dia gram of the board. Figure 1: Virtex-4 LX/S X Prototype Platform Block Diagram.
10 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R Detailed De scription The Virtex-4 prototype platfo rm board is shown in Figure 2 . Each feature is detailed in the numbered s ecti ons that follow.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 11 UG078 (v 1.2) May 24, 20 06 Detailed Description R Off Position In the OFF position, the pow er switch disables all mo des of powering the D UT. Power Enab l e Jumpers For ea ch powe r supply there are heade rs marked SUPPLY on one side and JA CK on the other s i de.
12 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 3. Configurat ion Ports These header s can be used t o connect a Parallel Ca bl e III o r Parallel Cable IV cable to the board (see Table 2 ) an d support all Virtex-4 device co nfiguration modes.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 13 UG078 (v 1.2) May 24, 20 06 Detailed Description R 4. JT AG Chain Jumper J17 pro vi des the ability to have the Virtex-4 in the JT AG chain or remove it from the JT AG chai n. Note: The Vir tex-4 device mu st not be in the socket w hen detecting th e ISPROM in the chain.
14 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 6a. Upstream System ACE Int erface Connector The upstream System ACE inte rface connector, as s h own in Figure 4 , can be used to configure the DUT.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 15 UG078 (v 1.2) May 24, 20 06 Detailed Description R 6c. Upstream I nterface Connector The upstream interface co n necto r, as shown in Figure 6 , is used to configure the DUT in select map or slave-serial mode.
16 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 6d. Downstream In terface Connector The downstream interfa ce connector, as shown in Figure 7 , passes serial config uration information t o the DUT in the downstream prototype platfo rm board.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 17 UG078 (v 1.2) May 24, 20 06 Detailed Description R 10. Oscil lator Sockets The board h as four crystal oscilla tor sockets, all wired for standard LVTT L-type oscill ators. These sockets connect to the DUT clock pads as shown in Table 4 and Table 5 .
18 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 1 1. Dif ferential Clock Inputs In addition to the oscillator sockets, there are eight 50 Ω SMA c onne ctors that al low connection to an external function generato r.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 19 UG078 (v 1.2) May 24, 20 06 Detailed Description R 12. DUT Socket The DUT socket contains the user FPGA, referred to as the de vice unde r test (DUT ). Th e DUT must be oriented using the P1 indicator on the board.
20 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R Table 9 : Breakout Clock Pin Connections for FF1 148 and FF1513 FF1 148 F F1513 Label Clock Name.
Virtex-4 LX/SX Prot otype Platform www.xilinx.com 21 UG078 (v 1.2) May 24, 20 06 Detailed Description R 14. User LEDs (Active-Hig h) There are 16 a ct ive-high use r LEDs on the board. Befo re configuration, the LEDs reflect the statu s of t he co nfiguratio n mode pins.
22 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 15. PROGRAM Switch The active-low PROGRAM switch, when pressed, g rounds the program pin on the DUT.
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If you already are a holder of Xilinx UG078, but have not read the manual yet, you should do it for the reasons described above. You will learn then if you properly used the available features, and whether you have not made any mistakes, which can shorten the lifetime Xilinx UG078.
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