Instruction/ maintenance manual of the product ML310 Xilinx
Go to page of 70
R ML310 User Guide V irtex-II Pro Embedded Development Platform UG068 ( v1.01) A ugust 2 5, 2004.
ML310 U ser Guide www .xilinx .com UG068 ( v1. 01) Augu st 25, 200 4 1-800-255-7 778 "Xilinx" and t he Xili nx log o shown above a re re gister ed trad emarks of Xilinx , Inc.
UG068 (v 1.01) August 25, 2 004 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 ML310 User Guide UG068 (v1.01) August 25, 2004 The following table shows th e revision history for this docu ment.. V ersion Revision 08/15/ 04 1.0 Initi al Xi linx r eleas e.
ML310 U ser Guide www .xilinx .com UG068 ( v1. 01) Augu st 25, 200 4 1-800-255-7 778.
ML310 U ser Guide www .xilinx .com 5 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Preface: About This Manu al Chapter 1: Introd uction to Vi rtex-II Pro, ISE, an d EDK Virtex-II Pro . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 R PCI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 ALi South Bridge Interfac e, M1535D+, U1 5 .
ML310 U ser Guide www .xilinx .com 7 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 R Pr efac e About This Manual This manual acco mpanies the ML310 Embedded Development System and con t ains informat ion about the ML 310 Hardwar e Platfo rm and softw ar e tools.
8 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter : R Conventions This document uses the following conventions.
ML310 U ser Guide www .xilinx .com 9 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 R Online Docu ment The following conventions ar e us ed in this document: V ert ical ellips is . . . Repetitive material tha t has been omitted IOB #1: Name = QOUT’ IOB #2: Name = CLKIN’ .
10 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter : R.
ML310 U ser Guide www .xilinx .com 11 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 R Chapter 1 Intr oduction to V irtex-II Pr o, ISE, and EDK V irtex-II Pro The V irtex-II Pro Platform FPGA sol ution is the mos t technically sophi sticated silicon a nd software pr oduct development in the history of the programmable logic industry .
12 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 1: Introduction to V irtex-II Pro, ISE, and EDK R PowerPC™ 405 Core • Embedded 300+ MHz Harvard ar chitecture cor e • Low power cons u mption: 0.
ML310 U ser Guide www .xilinx .com 13 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Vir te x -I I Pr o R • Four levels of selectable pre-emphasis • Five levels of outp ut differ en tial voltage • Per-channel internal loopba ck modes • 2.
14 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 1: Introduction to V irtex-II Pro, ISE, and EDK R - 840 Mb/s Low-V oltage Dif f eren t ial Signaling I/O (.
ML310 U ser Guide www .xilinx .com 15 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Foundation ISE R IP . ISE even includes technology called IP Builder , which allows you to capture your own IP and r eus e it in other designs.
16 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 1: Introduction to V irtex-II Pro, ISE, and EDK R Board Level Integration Xilinx understa nds the critical.
ML310 U ser Guide www .xilinx .com 17 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 R Chapter 2 ML310 Embedded Development Platform Overview The ML310 Embed ded Development P latform offers designers a versatile V irtex-II Pro XC2VP30-FF89 6 based platform for rapid pro t otyping and system verifi cation.
18 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Figure 2- 1: M L310 Board.
ML310 U ser Guide www .xilinx .com 19 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Overview R Figure 2-2 show s a high -lev el block diag ram of the ML31 0 and it s pe ripher als.
20 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R ♦ 2 USB ports ♦ 2 IDE conne ctors ♦ GPIO ♦ SMBus Int er.
ML310 U ser Guide www .xilinx .com 21 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R II Pro FPGA I/O ca n be configured to use different IO standards such as SSTL2 a s required on the DDR DIMM interface. Pleas e review the ML3 10 V irtex-II Pro data sheet for mor e informatio n regarding I/O stan dards.
22 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R DDR Signaling The FPGA DDR DIM M interface sup ports SSTL2 signa ling. All DDR sign als are controlled impedance and ar e SSTL2 terminated.
ML310 U ser Guide www .xilinx .com 23 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R ddr_ ad[2] AG 20 DDR_A 2 41 ddr_ ad[3] AF23 DDR_A 3 130 ddr_ad[ 4] AH22 DDR_A4 37 ddr_ ad[5] AF22.
24 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R ddr_ dqs[5] M29 DDR_DQ S02 25 ddr_ dqs[6] H 29 DDR_DQ S01 14 dd.
ML310 U ser Guide www .xilinx .com 25 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R The connections fr om the FP GA to the DDR DIMM support either a r egistered or an unbuffer ed DIMM.
26 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R unbuffer ed DIMM requir es more than one clock input pair versus a single clock input pair for a regi stere d D IMM .
ML310 U ser Guide www .xilinx .com 27 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R a U A RT us a b l e w i t h a n y m em b e r of th e Vir t e x - I I P ro d e v i c e f a m il y . P l e a s e r e v i e w t h e E D K Pr ocessor IP Re fer ence Gui de for more details.
28 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Non-V olatile Storage In addition to programming the FPGA and s toring bitstreams, System A CE can be us ed for general use non-vola tile storage.
ML310 U ser Guide www .xilinx .com 29 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R JT AG JT AG is a simple i n terface that provides fo r many uses.
30 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Parallel Cable IV Interface The Parallel Cable IV (PC IV) download ca ble can also be used to pr ogram the XC2VP30.
ML310 U ser Guide www .xilinx .com 31 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R Figure 2 -8: LEDs and LCD Connectivity VCC3V3 SN74LVC244A 2Y1 2OE 2A2 2A3 2A4 2Y4 2Y3 2Y2 2A1 1Y1.
32 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R GPIO LED Interface All LEDs con nected to the GPIO lines ill uminate Green when dri ven with a lo gic zero and extinguish wi th a logic on e.
ML310 U ser Guide www .xilinx .com 33 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R The three GPIO signals conf igured as outpu ts only are used as control signa ls that allow s the user to read/write the LCD character displa y in conjunctio n with the eight LCD data signals defined e arlier in Ta b l e 2 - 7 .
34 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R The PPC405 JT AG (Joint T est Action Group) Debug port complies with IEEE standard 1 149.1-19 9 0, IEEE Standa rd T est Access Port a n d Boundary Scan Ar chitecture.
ML310 U ser Guide www .xilinx .com 35 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R CPU Debug Connector Pinout Figure 2-10 shows J12, the 16 pin header used to debug the operation o f software in t he CPU. This is done usin g debug tools such as Paral lel Cable IV or third party tools.
36 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Arbiter IP . Please s ee the EDK Processor IP Ref erence Guide for mor e information about the EDK IP mention ed in this secti on.
ML310 U ser Guide www .xilinx .com 37 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R Ta b l e 2 - 1 0 shows the con nections for the PCI controller .
38 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R PCI_ IN T A L5 PCI Int errupt Sig nals PCI_ IN TB N2 PCI_ IN TC.
ML310 U ser Guide www .xilinx .com 39 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R PCI _AD[0] G 5 PCI Address/Data Lines PCI _AD[1] G 6 PCI _AD[2] D 5 PCI _AD[3] C5 PCI _AD[4] C1 P.
40 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Ta b l e 2 - 1 1 describes how the Primary PCI Bus interrupts ar e connected on the ML310 boar d along with each devices IDSEL, REQ/GNT , PCI Clocks and DeviceID/V endor ID informatio n.
ML310 U ser Guide www .xilinx .com 41 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R ALi M1535D + supports the following featur es: ♦ 1 para llel and 2 seri al po rts ♦ 2 USB por.
42 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Ta b l e 2 - 1 3 shows the ALi Parallel Port connection s to P1, DB25.
ML310 U ser Guide www .xilinx .com 43 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R Ta b l e 2 - 1 4 shows the RS -232 signals con nected to the two DB9 connectors , P1 A/B. USB, connector assembly J3 The M1535D+ USB is an implementation of the Universal Serial Bus (US B) 1.
44 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R IDE, connectors J15 and J16 Supports a 2-channel UltraDM A-133 IDE Master contr oller independently connected to a Primar y 40 Pin IDC conne ctor (J16) and a Secon dar y 40 Pi n IDC c onne ctor ( J15) .
ML310 U ser Guide www .xilinx .com 45 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R GPIO, connector J5 There ar e 15 GPIO pins connecting the ALi M1535D+ to the J5 24 pin header . These ma y be accessed via the ALi M15 35D+ via the PCI Bus.
46 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R send byte/r eceive byte/ write byte/write word/r ead word/block read/block write command w ith clock synch ronization functi on as wel l as 10-b it addressing abilit y .
ML310 U ser Guide www .xilinx .com 47 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R PS/2 Keyboard/Mouse Inter face, connector P2 The ALi M1535D + has a built-in PS2/A T Keyboard an d PS/2 Mouse cont roller .
48 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Intel G D82559, U1 1, 10/1 00 Ethernet Controll er Intel GD8255.
ML310 U ser Guide www .xilinx .com 49 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R review the G D 82559 Data s heet, located on the ML31 0 CDROM, for more detailed informatio n. IIC/SMBus Int erface Introduction to IIC/SMBus The Inter Integrated Circuit (IIC) bus provides the connectio n from the CPU to peripherals.
50 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Ta b l e 2 - 2 2 shows th e FPGA conn ections to all SMBu s and IIC devices.
ML310 U ser Guide www .xilinx .com 51 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R Ta b l e 2 - 1 4 shows a block diagram of the FPGA in relation to the SMBus a ccelerator and the IIC bus.
52 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R Ta b l e 2 - 2 3 lists the IIC d evices and their a ssociated ad dresses.
ML310 U ser Guide www .xilinx .com 53 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R SPI Addressing The SPI does not use an addr essed based system like the IIC Bus Interface uses. Instead, devices are selected by dedicated Slave Select signals, compara ble to a Chip Select si gnal.
54 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R CPU Reset, SW2 SW2 provides a way to manua lly reset the powerpc system implem ented in the XC2V P30. The user is responsible for connecting this signal to th e PPC405 system implem ented in the FPGA fabric.
ML310 U ser Guide www .xilinx .com 55 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R SW3 = 0 0 0 (d efault ) Front Panel Interface Conne ctor , J23 The Fron t pan el Int erfa ce co nnec tor ( J23) is a 24 -pi n head er tha t acc epts a stan dard IDC 24 pin connector (0.
56 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R The front panel interface provides the followin g status info rmation avail able at the J23 heade r .
ML310 U ser Guide www .xilinx .com 57 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R Jumpers MGT VTRX T erminat ion V oltage Jumper s, J10 and J1 1 The MGT rece i ve termination voltage, VTRX, on the top a nd bottom MGT s ar e jumper selectabl e via jumpers J10 (top) and J1 1 (bottom).
58 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R MGT BREF Clock Sel ection Jumpers, J20 an d J21 One of two onboar d L VDS BREF clock sources, X7 o r X9, can be selected via jumpers, J20 and J21.
ML310 U ser Guide www .xilinx .com 59 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 Board Hardware R Note: An Antec, model SL250 S, A TX Power Supply is delivered wi th your ML310. The Antec Us er ’ s Manual is provided in the Data sheets section on the ML310 CDROM.
60 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R In addition to the MC34161D vo ltage monitors, th e ML310 employs a SMBus dev ice, LM87, whi ch samp les several of the same supply volta ges when acce ssed ove r the Syst em Managemen t Bus or SMBus.
ML310 U ser Guide www .xilinx .com 61 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 High-Speed I/O R Ta b l e 2 - 2 8 Shows the various V oltage monitor inform ation. High-Speed I/O Xilinx V irtex-II Pro FPGAs offer a variety of high-speed I/O solutions.
62 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R ML310 PM Connect ors The ML310 PM connectors ar e T yco Z-Dok+ connectors, part number 1367550-5. The "-5" suffix indicates a 40 pai r connector .
ML310 U ser Guide www .xilinx .com 63 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 High-Speed I/O R Figure 2-20 shows an edge view of the PM host boar d connectors on the ML310 board . Each s ignal pair on t he PM1 a nd PM2 ho st bo ard conn ect ors has a wide ground pin on t he opposite s ide of the plastic divider , as shown in Figure 2-21 .
64 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R • 1 single-en ded clock at 2.
ML310 U ser Guide www .xilinx .com 65 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 High-Speed I/O R PM1 Power and Grou nd Ta b l e 2 - 2 9 shows the power and gro und pins for the PM1 connector on the ML310. PM2 Power and Grou nd Ta b l e 2 - 3 0 shows the power and gro und pins for the PM2 connector on the ML310.
66 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R A1 1 H16 IO_L69P_0 PM_IO_82 2.
ML310 U ser Guide www .xilinx .com 67 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 High-Speed I/O R D4 G25 IO_L02N _7 PM_IO_85 2.5V D5 A8 IO_L 44N_1 P M_IO_3 V_21 3V D6 B8 IO_L4 4P_1 PM_ IO_3V_2 0 .
68 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R ML310 PM2 User I/O The PM2 connector makes most of the L VDS pairs available to the user , along with single- ended signal s.
ML310 U ser Guide www .xilinx .com 69 UG068 (v 1.01) August 25, 2 004 1-800-255-7 778 High-Speed I/O R C1 W1 IO_L57N_3 PM_IO_53 2.5 V C2 Y1 IO_L57P_3 PM_IO_52 2.5 V C3 U4 IO_L85N_3 PM_IO_61 2.5 V C4 U5 IO_L85P_3 PM_IO_60 2.5 V C5 W5 IO_L50N_3 PM_IO_39 2.
70 www .xilinx .com ML310 U ser Guid e 1-800-255-7 778 UG068 (v1.01) Augu st 25, 2004 Chapter 2: ML310 Embedded De v elopment Platform R D14 AA5 IO_L44N_ 3 PM_I O_27 2.5 V D15 AC4 IO_L43P_ 3 PM_I O_24 2.5 V D16 AC3 IO_L43N_ 3 PM_I O_25 2.5 V D17 AE4 IO_L3 3P_3 PM_IO _10 2.
An important point after buying a device Xilinx ML310 (or even before the purchase) is to read its user manual. We should do this for several simple reasons:
If you have not bought Xilinx ML310 yet, this is a good time to familiarize yourself with the basic data on the product. First of all view first pages of the manual, you can find above. You should find there the most important technical data Xilinx ML310 - thus you can check whether the hardware meets your expectations. When delving into next pages of the user manual, Xilinx ML310 you will learn all the available features of the product, as well as information on its operation. The information that you get Xilinx ML310 will certainly help you make a decision on the purchase.
If you already are a holder of Xilinx ML310, but have not read the manual yet, you should do it for the reasons described above. You will learn then if you properly used the available features, and whether you have not made any mistakes, which can shorten the lifetime Xilinx ML310.
However, one of the most important roles played by the user manual is to help in solving problems with Xilinx ML310. Almost always you will find there Troubleshooting, which are the most frequently occurring failures and malfunctions of the device Xilinx ML310 along with tips on how to solve them. Even if you fail to solve the problem, the manual will show you a further procedure – contact to the customer service center or the nearest service center
