Instruction/ maintenance manual of the product TAS5508-5142K7EVM Texas Instruments
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TAS5508-5142K7EVM User’s Guide Evaluation Module for the TAS5508B Digital Audio PWM Processor and TAS5142 Digital Amplifier Power Output Stage User's Guide June 2006 SLEU071.
2 SLEU071 – June 2006 Submit Documentation Feedback.
Contents 1 Overview ................................................................................................................... 5 1.1 TAS5508-5142K7EVM Features ..................................................................................
List of Figures 1-1 Integrated PurePath Digital™ Amplifier System ......................................................................... 6 1-2 Physical Structure for TAS5508-5142K7EVM (Rough Outline) ..............................................
Chapter 1 SLEU071 – June 2006 Overview The TAS5508-5142K7EVM PurePath Digital™ customer evaluation amplifier module demonstrates two audio integrated circuits, TAS5508B and TAS5142, from Texas Instruments (TI).
www.ti.com 1.1 TAS5508-5142K7EVM Features I2S Bus T AS 5508-5142K7EVM MODULE I2CBus Example TIInput-USB board 6 Channel Analog Input USB Interface Optical and Coaxia l S/PDIF Input ControlInt.
www.ti.com 1.2 PCB Key Map SPEAKEROUTPUTS SPEAKEROUTPUTS T AS 5508B OUTPUT STAGE CHANNEL 1 OUTPUT STAGE CHANNEL 3 OUTPUT STAGE CHANNEL 2 OUTPUT STAGE CHANNEL 4 OUTPUT STAGE CHANNEL 5 3.
www.ti.com PCB Key Map Overview 8 SLEU071 – June 2006 Submit Documentation Feedback.
2.1 Power Supply (PSU) Interface (J901 and J900) Outputstagepowersupply RESET >1ms Systempowersupply 4 1 2 3 (PCBconnectortopview) Chapter 2 SLEU071 – June 2006 System Interfaces This chapter describes the TAS5508-5142K7EVM board in regards to power supplies and system interfaces.
www.ti.com 2.2 PSU Control Interface (J902) 1 2 3 5 4 (PCBconnectortopview) 2.3 Loudspeaker Connectors (J101 … J107) PSU Control Interface (J902) Table 2-2. J901 Pin Description PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION 1 PVDD Output-stage power supply 2 SYSTEM System power supply 3 GND Ground 4 GND Ground Table 2-3.
www.ti.com 1 2 (PCBconnectortopview) 2.4 Headphone Connector (J700) 1 4 2 3 2.5 Control Interface (J40) Headphone Connector (J700) Figure 2-4. J101 . . . J107 Pin Numbers Table 2-5. J101 . . . J107 Pin Description PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION 1 OUT-1 Speaker negative output 2 OUT-2 Speaker positive output Figure 2-5.
www.ti.com Control Interface (J40) Table 2-7. J40 Pin Description (continued) PIN NO. NET-NAME AT SCHEMATICS DESCRIPTION 11 GND Ground 12 SCL I 2 C bit clock 13 RESERVED — 14 RESERVED — 15 RESERVED — 16 RESERVED — 17 GND Ground 18 RESERVED — 19 RESERVED — 20 SD Shutdown error reporting for all channels.
www.ti.com 2.6 Digital Audio Interface (J60) Digital Audio Interface (J60) The digital audio interface contains digital audio signal data (I 2 S), clocks, etc. Please see the TAS5508B Data Manual for signal timing and details not explained in this document.
www.ti.com Digital Audio Interface (J60) System Interfaces 14 SLEU071 – June 2006 Submit Documentation Feedback.
3.1 Short-Circuit Protection and Fault-Reporting Circuitry 3.2 Fault Reporting Chapter 3 SLEU071 – June 2006 Protection This chapter describes the short-circuit protection and fault-reporting circuitry of the TAS5142 device.
www.ti.com Fault Reporting Protection 16 SLEU071 – June 2006 Submit Documentation Feedback.
4.1 Trademarks Chapter 4 SLEU071 – June 2006 Related Documentation From Texas Instruments The following is a list of documents that have detailed descriptions of the integrated circuits used in the design of the TAS5508-5142K7EVM. This information can be obtained at the URL http://www.
EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use.
EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 0 to 32 V and the output voltage range of 15 V to 20 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
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