Instruction/ maintenance manual of the product TAS5066PAG Texas Instruments
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IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
EVM IMPORT ANT NOTICE T exas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EV ALUA TION PURPOSES ONL Y and is not considered by TI to be fit for commercial use.
EVM W ARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of xxx V and the output voltage range of xxx V and xxx V . Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM.
Notational Conventions v Preface About This Manual This manual describes the operation of the T AS5066-51 1 1D6EVM evaluation module from T exas Instruments.
T rademarks vi Related Documentation from T exas Instruments The following table contains a list of data manuals that have detailed descrip- tions of the integrated circuits used in the design of the T AS5066−51 1 1D6EVM. The data manuals can be obtained at the URL http://www .
Contents vii 1 Overview 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 T AS5066-51 1 1D6EVM Features 1-2 . . . . . . . . .
Contents viii 1−1 Complete PurePath Digital System 1-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1−2 Physical Structure for the T AS5066-51 1 1D6EVM 1-3 . . . . . . . . . . . .
1-1 Overview The T AS5066−51 1 1D6EVM PurePath Digital t customer evaluation module demonstrates two integrated circuits T AS5066 and T AS51 1 1DAD from T exas Instruments (TI). The T AS5066 is a high-performance 24-bit six-channel digital pulse width modulator (PWM) based on Equibit TM technology .
T AS5066-51 1 1D6EVM Features 1-2 1.1 T AS5066-51 1 1D6EVM Features - 6-channel PurePath Digital t evaluation module - Self-contained protection system (short circuit and thermal) - Standard I 2 S and I 2 C/control connector for TI input board - Double-sided plated-through PCB layout Figure 1−1.
PCB Key Map 1-3 Overview 1.2 PCB Key Map The physical structure for the T AS5066−51 1 1D6EVM is illustrated in the fol- lowing figure. Figure 1−2. Physical Structure for the T AS5066-51 1 1D6EVM C.
1-4.
2-1 System Interfaces This chapter describes the T AS5066−51 1 1D6EVM board in regards to power supply (PSU) and system interfaces. T opic Page 2.1 PSU Interface (J901) 2-2 . . . . . . . . . . . . . .
PSU Interface (J901) 2-2 2.1 PSU Interface (J901) The T AS5066−51 1 1D6EVM module must be powered from one or two exter- nal regulated power supplies. High audio performance requires a stabilized output stage power supply with low ripple voltage and low output impedance.
PSU Interface (J901) 2-3 System Interfaces Figure 2−2. J901 and J903 Pin Numbers (PCB Connector T op View) 4 3 2 1 T able 2−2. J901 Pin Description Pin Number Net-Name at Schematics Description 1 V -HBRIDGE Output stage power supply 2 − System power supply 3 GND Ground 4 GND Ground T able 2−3.
PSU Control Interface (J902) 2-4 2.2 PSU Control Interface (J902) This interface is used for on-board sensing of output supply voltage and for power supply volume control (PSCV) signal. Figure 2−3. J902 Pin Numbers (PCB Connector T op View) 4 3 2 1 5 T able 2−4.
Loudspeaker Connectors (J100 − J600) 2-5 System Interfaces 2.3 Loudspeaker Connectors (J100 − J600) Both positive and negative speaker outputs are floating and may not be connected to ground (e.g., through an oscilloscope). Figure 2−4. J100 − J600 Pin Numbers (PCB Connector T op View) 2 1 T able 2−5.
Control Interface (J50) 2-6 2.4 Control Interface (J50) This interface connects the T AS5066-51 1 1D6EVM board to a TI input board. T able 2−6. J50 Pin Description Pin Number Net-Name at Schematics Description 1 GND Ground 2 PSVC Power supply volume control from (mC) input board 3 GND Ground 4 RESET System reset (bi-directional).
Digital Audio Interface (J51) 2-7 System Interfaces 2.5 Digital Audio Interface (J51) The digital audio interface contains digital audio signal data (I2S), clocks etc. Please see the T AS5066 data manual for signal timing and details not ex- plained in this document.
PWM Timing, Interchannel Delay Registers 2-8 2.6 PWM Timing, Interchannel Delay Registers Fo r maximum performance, the PWM timing must be optimized for the specific configuration and PCB layout.
3-1 Protection This chapter describes the short circuit protection and fault reporting circuitry of the T AS51 1 1 device. T opic Page 3.1 Short Circuit Protection and Fault Reporting Circuitry 3-2 . . . . . . . . . . . 3.
Short Circuit Protection and Fault Reporting Circuitry 3-2 3.1 Short Circuit Protection and Fault Reporting Circuitry T AS51 1 1 i s a self-protecting device that provides device fault reporting (includ- ing high-temperature protection and short circuit protection).
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