Instruction/ maintenance manual of the product SCAU020 Texas Instruments
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10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board User's Guide March 2007 Serial Link Products SCAU020.
2 SCAU020 – March 2007 Submit Documentation Feedback.
Contents 1 General Description ..................................................................................................... 5 2 Signal Path and Control Circuitry ................................................................................
List of Figures 1 CDCE421EVM Evaluation Board .......................................................................................... 5 2 CDCE421EVM Programming Blocks ................................................................................
1 General Description User's Guide SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board Figure 1. CDCE421EVM Evaluation Board Features: • Easy-to-use evaluation module generates low phase noise clocks between 10.
www.ti.com 2 Signal Path and Control Circuitry Signal Path and Control Circuitry The CDCE421 can accept a 27MHz—38.33MHz frequency input from either an LVCMOS source (up to 3.3V) or a crystal in the same frequency range. The CDCE421EVM is divided into four blocks.
www.ti.com 3 Block Description 3.1 Block A 3.2 Block B 3.3 Block C 3.4 Block D 4 Software-Selectable Options Block Description This section discusses the four EVM blocks. Block A includes a CDCE421 QFN device that accepts an LVCMOS reference input through the vertical SMA input connector (Ref Input) which is ac-coupled onto the board.
www.ti.com 5 Installing the Software GUI and USB Driver Installing the Software GUI and USB Driver The CDCE421EVM software can be installed on a PC running the Microsoft Windows ® 2000 operating system or higher (including Windows XP ® ). To start software installation, run the ChronosSetup.
www.ti.com 6 ChronosGUI 6.1 Using Software-Enabled Automatic PLL Selection ChronosGUI After the setup wizard completes, start the GUI interface from the Start menu (Start → Texas Instruments → Chronos Eval → TIChronosGUI.exe). Connect the USB cable to the EVM.
www.ti.com ChronosGUI frequency should be entered here in this format: xx.xxx (specified in MHz). Step 3. Output Calculator and Apply PLL Settings. The second row of calculations is used to obtain the PLL settings necessary to achieve a particular output frequency provided a given input frequency to CDCE421.
www.ti.com 6.2 Manual PLL Block Selection (Advanced Control) ChronosGUI The advanced control screen helps to set the PLL without having to manually alter the individual blocks within the PLL.
www.ti.com ChronosGUI Table 1 lists the various menu items in this screen. Table 1. Software Settings Description Section Function VCO Select Selects between VCO1 and VCO2. Only one VCO can be used during operation. See CDCE421 data sheet for VCO tuning ranges.
www.ti.com 7 Configuring the Board 7.1 Programming and Testing Configuration (USB Cable Attached)—Default Configuration 7.2 Programming Configuration (USB Cable Attached) AUX Usingexternal 3.
www.ti.com 8 Schematics and Layout Schematics and Layout Figure 9. CDCE421EVM Block Switch Off Figure 10 through Figure 14 show the printed circuit board (PCB) schematics. Note: Board layouts are not to scale. These figures are intended to show how the board is laid out; they are not intended to be used for manufacturing CDCE421EVM PCBs.
www.ti.com Schematics and Layout Figure 10. CDCE421EVM Board Schematic SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board 15 Submit Documentation Feedback.
www.ti.com Schematics and Layout Figure 11. CDCE421EVM Board—Block A Schematic 16 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board SCAU020 – March 2007 Submit Documentation Feedback.
www.ti.com Schematics and Layout Figure 12. CDCE421EVM Board—Block B Schematic SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board 17 Submit Documentation Feedback.
www.ti.com Schematics and Layout Figure 13. CDCE421EVM Board—Block C Schematic 18 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board SCAU020 – March 2007 Submit Documentation Feedback.
www.ti.com Schematics and Layout Figure 14. CDCE421EVM Board—Block D Schematic SCAU020 – March 2007 10.9MHz–1175MHz Low Phase Noise Clock Evaluation Board 19 Submit Documentation Feedback.
EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
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