Instruction/ maintenance manual of the product MAX12557 Maxim
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General Description The MAX12557 is a dual 3.3V, 14-bit analog-to-digital converter (ADC) featuring fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12557 is optimized for low power, small size, and high dynamic performance in intermediate frequen - cy (IF) and baseband sampling applications.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC 2 _______________________________________________________________________________________ ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC 4 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC _______________________________________________________________________________________ 5 ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC 6 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC _______________________________________________________________________________________ 7 ELECTRICAL CHARACTERISTICS (continued) (V DD = 3.3V, OV DD = 2.0V, GND = 0, REFIN = REFOUT (internal reference), C L ≈ 10pF at digital outputs, V IN = -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC 8 _______________________________________________________________________________________ -2.0 -1.0 -1.5 0 -0.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC _______________________________________________________________________________________ 9 20 40 30 60 50 70 80 -55 -45 -40 -35 -50 -30 -25 -20 -15 -10 -5 0 MAX12557 toc13 A IN (dBFS) SNR, SINAD (dB) SNR, SINAD vs.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC 10 ______________________________________________________________________________________ 60 65 75 70 80 85 3.0 3.2 3.1 3.3 3.4 3.5 3.6 -THD, SFDR vs. ANALOG SUPPLY VOLTAGE (f CLK = 65.00352MHz, f IN = 175MHz) MAX12557 toc22 V DD (V) -THD, SFDR (dBc) SFDR -THD 60 64 72 68 76 80 1.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC ______________________________________________________________________________________ 11 60 66 64 62 72 70 68 74 76 -40 10 -15 35 60 85 SNR, SINAD vs.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC 12 ______________________________________________________________________________________ PIN NAME FUNCTION 1, 4, 5, 9, 13, 14, 17 GND Converter Ground. Connect all ground pins and the exposed paddle (EP) together.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC ______________________________________________________________________________________ 13 PIN NAME FUNCTION 28 D0B Channel B CMOS Digital Output, Bit 0 (.
MAX12557 Detailed Description The MAX12557 uses a 10-stage, fully differential, pipelined architecture (Figure 1) that allows for high- speed conversion while minimizing power consump- tion. Samples taken at the inputs move progressively through the pipeline stages every half clock cycle.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC ______________________________________________________________________________________ 15 INBP 14-BIT PIPELINE ADC DIGIT AL ERROR CORRECTION CHANNEL A RE.
MAX12557 Analog Inputs and Input Track-and-Hold (T/H) Amplifier Figure 3 displays a simplified functional diagram of the input T/H circuit. This input T/H circuit allows for high analog input frequencies of 175MHz and beyond and supports a V DD / 2 common-mode input voltage.
to GND. Bypass REF_P to REF_N with a 10µF capacitor. Bypass REFIN and REFOUT to GND with a 0.1µF capac- itor. The REFIN input impedance is very large (>50M Ω ). When driving REFIN through a resistive divider, use resistances ≥ 10k Ω to avoid loading REFOUT.
MAX12557 select either one-half or one-fourth of the clock speed for sampling provides design flexibility, relaxes clock requirements, and can minimize clock jitter. System Timing Requirements Figure 5 shows the timing relationship between the clock, analog inputs, DAV indicator, DOR_ indicators, and the resulting output data.
externally isolates it from heavy capacitive loads. Refer to the MAX12557 EV kit schematic for recommendations of how to drive the DAV signal through an external buffer. Data Out-of-Range Indicator The DORA and DORB digital outputs indicate when the analog input voltage is out of range.
MAX12557 The digital outputs D0A/B–D13A/B are high impedance when the MAX12557 is in power-down (PD = 1) mode. D0A/B–D13A/B enter this state 10ns after the rising edge of PD and become active again 10ns after PD transitions low.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC ______________________________________________________________________________________ 21 BINARY -TO-GRA Y CODE CONVERSION 1) THE MOST SIGNIFICANT GRA Y -CODE BIT IS THE SAME AS THE MOST SIGNIFICANT BINARY BIT .
MAX12557 Applications Information Using Transformer Coupling In general, the MAX12557 provides better SFDR and THD with fully differential input signals than single- ended input drive, especially for input frequencies above 125MHz.
Buffered External Reference Drives Multiple ADCs The buffered external reference mode allows for more control over the MAX12557 reference voltage and allows multiple converters to use a common reference. The REFIN input impedance is >50M Ω . Figure 12 shows the MAX6029 precision 2.
MAX12557 ence, allowing REF_P, REF_N, and COM_ to be driven directly by a set of external reference sources. Figure 13 uses a MAX6029 precision 3.000V bandgap reference as a common reference for multiple convert- ers. A seven-component resistive divider chain follows the MAX6029 voltage reference.
mount devices for minimum inductance. Bypass V DD to GND with a 220µF ceramic capacitor in parallel with at least one 10µF, one 4.7µF, and one 0.1µF ceramic capacitor. Bypass OV DD to GND with a 220µF ceramic capacitor in parallel with at least one 10µF, one 4.
MAX12557 Total Harmonic Distortion (THD) THD is the ratio of the RMS sum of the first six harmon- ics of the input signal to the fundamental itself. This is expressed as: where V 1 is the fundamental amplitude, and V 2 through V 7 are the amplitudes of the 2nd- through 7th-order harmonics (HD2 through HD7).
Gain Matching Gain matching is a figure of merit that indicates how well the gains between the two channels are matched to each other. The same input signal is applied to both channels and the maximum deviation in gain is report- ed (typically in dB) as gain matching.
MAX12557 Dual, 65Msps, 14-Bit, IF/Baseband ADC Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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