Instruction/ maintenance manual of the product SDS2 Intel
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Intel® Server Board SDS2 Technical Product Specification Order Number: A85874 - 002 Revision 1.2 December 2, 2002 Enterprise Platforms and Services Marketing.
Revision History Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 ii Revision History Date Revision Number Modifications 9/20/2001 1.0 Initial release. 5/ 15/2002 1.1 Added Section 13: Errata. Corrected miscellaneous document errors. Added Table 6.
Intel® Server Board SDS2 Disclaimers Revision 1.2 Order Number: A85874 - 002 iii Disclaimers Information in this document is provided in connection with Intel ® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document.
Table of Co ntents Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 iv Table of Contents 1. Introduction ............................................................................................................................. 1 2.
Intel® Server Board SDS2 Table of Contents Revision 1.2 Order Number: A85874 - 002 v 4.6.2 BIOS Flash .................................................................................................................. 20 4.7 Interrupt Routing ........
Table of Contents Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 vi 6.3.4 Clearing CMOS ........................................................................................................... 67 6.4 Flash Update Utility ........
Intel® Server Board SDS2 Table of Contents Revision 1.2 Order Number: A85874 - 002 vii 8.9 Connector Manufacturers and Part Numbers .................................................................. 87 9. Jumpers .....................................
Table of Contents Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 viii 5. Intel® & ICP Vortex* RAID Controllers will cause the Intel® Server Board SDS2 t o halt during POST when the BIOS Logo screen is enabled .................
Intel® Server Board SDS2 Table of Contents Revision 1.2 Order Number: A85874 - 002 ix 34. Peer - to - peer PCI transactions are not supported between the CIOB - controlled 64 - bit PCI bus and the legacy 32 - bit PCI bus controlled by the HE - SL north bridge .
List of Figures Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 x List of Figures Figure 1. SDS2 Server Board Block Diagram ................................................................................. 1 Figure 2. SDS2 Memory Bank Layout .
Intel® Server Board SDS2 List of Tables Revision 1.2 Order Number: A85874 - 002 xi List of Tables Table 1. SDS2 Intel® Pentium® III Processor Support Matrix ......................................................... 4 Table 2. Memory DIMM Pairs ....
List of Tables Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 xii Table 32. Main Menu Selections .................................................................................................... 55 Table 33. Primary Master and Slave IDE Submenu Selections .
Intel® Server Board SDS2 List of Tables Revision 1.2 Order Number: A85874 - 002 xiii Tabl e 66. IDE 40 - pin Connector Pin - out ........................................................................................ 82 Table 67. Stacked Three - port USB Connector Pin - out .
List of Tables Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 xi v < This page intentionally left blank. >.
Intel® Server Board SDS2 Introduction Revision 1.2 Order Number: A85874 - 002 1 1. Introduction This chapter provides an archite ctural overview of the Intel® SDS2 Server Board. It provides a view of the functional blocks and their electrical relationships.
Architecture Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 2 2. Architecture The SDS2 Server Board is a monolithic printed circuit board that can accept two Intel ® Pentium ® III processors using the Socket 370 FCPGA2 package. The SDS2 Server Board complies with the Entry SSI version 1.
Intel® Server Board SDS2 Arch itecture Revision 1.2 Order Number: A85874 - 002 3 • 64 - bit, 66 - MHz 3.3 V full - length PCI segment C (P6 4 - C ) with one embedded device - Dual Channel Wide Ultra160 SCSI controller : Adaptec* AIC - 7899W - Two 64 - bit 3.
Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 4 3. Processor and Chipset The Server Works* ServerSet III HE - SL chipset provides the 36 - bit address , 72 - bit data (64 - bit data + 8 - bit ECC) process or host bus interface , operating at 133 MHz in the AGTL signaling environment .
Intel® Server Board SDS2 Processor and Chipset Revision 1.2 Order Number: A85874 - 002 5 Pentium III – Tray SL5XL Intel Pentium III – Boxed FCPGA2 843849 1.4GHZ/133MHz 512KB tA 1 06B1h SL5XL Yes Notes: • All processor sockets must be populated with either a processor or a terminator module .
Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 6 3.1.1 Processor Voltage Regulator Module (VRM) The SDS2 Server Board has dual, on board, RM circuitry to support the two processors. The circuit is c ompliant with the VRM8.
Intel® Server Board SDS2 Processor and Chipset Revision 1.2 Order Number: A85874 - 002 7 Table 2 . Memory DIMM Pairs Memory DIMM DIMM PAIR Row DIMM1 A , DIMM 1 B 1 1, 2 DIMM2 A , DIMM2B 2 3, 4 DIMM3A, DIMM3B 3 5 , 6 DIMM Pair 1 DIMM Pair 2 DIMM Pair 3 Figure 2 .
Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 8 3.2.2 I 2 C Bus An I 2 C* bus is between the BMC and the six DIMM slots. This bus is used by the system BIOS to retrieve DIMM information needed to program the HE - SL memory registers which are required to boot the system.
Intel® Server Board SDS2 Processor and Chipset Revision 1.2 Order Number: A85874 - 002 9 3.3.1 CNB20HE - SL Champion North Bridge The Champion North Bridge Rev 2.0 High End Super Lite (CNB20HE - SL ) is the third generation product in the Server Works Champion North Bridge Technology.
Processor and Chipset Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 10 3.3.2 CIOB20 Champion I/O Bridge The Champion I/O Bridge (CIOB) i s a 352 - pin ball - grid array device and provides an integrated I/O bridge that provides a high - performance data flow path between the IMBus and the 64 - bit I/O subsystem.
Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85 874 - 002 11 4. I/O Subsystem 4.1 PCI Subsystem The primary I/O bus for SDS2 DP Server Board is PCI, with three PCI bus segments . The PCI buses comply with the PCI Local Bus Specification, Rev 2.
I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 12 Table 5 . P32 - A Configuration IDs IDSEL Value Device 18 ATI RAGE XL Video Controller 19 Intel 82550 Fast Et hernet Controller 1 20 Intel 82550 Fast Ethernet Controller 2 24 PCI Slot 3 25 PCI Slot 4 31 CSB5 South Bridge 4.
Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 13 Table 4 . P64 - B Configuration IDs IDSEL Value Device 24 PCI Slot 1 25 PCI Slot 2 Table 5 . P64 - C Configuration IDs IDSEL Value Device 20 Adaptec AIC - 7899W S CSI Controller 24 PCI Slot 5 25 PCI Slot 6 4.
I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 14 4.1.2.4 Zero Channel RAID (ZCR) Capable PCI Slot 6 The SDS2 Server Board supports zero - channel RAID controller on PCI Slot 6 .
Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 15 Table 9 . Video Modes SDS2 2D Mode Video Support 2D Mode Refresh Rate (Hz) 8 bpp 16 bpp 24 bpp 32 bpp 640x480 60, 72,.
I /O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 16 4.4.1 NIC Connecto r and Status LEDs The 82550 drives LEDs on the network interface connector to indicate link/activity on the LAN and 10 - Mbps or 100 - Mbps operation.
Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 17 • The scatter / gather mechanism supports both DMA and PIO IDE drives and ATAPI devices • Support for ATA and ATA.
I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 18 Pad GPIO Name Description Y19 N_NVRAMCL R Input from jumper to be in BIOS Recovery mode in case of corruption V17 N_P.
Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 19 Pin # Signal Name Description 35 N_BMC_SWIN 36 N_BMCPWRN Power LED from BMC 37 N_EXTEN_00 External Event 38 N_SUPERSC.
I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 20 4.6.2 BIOS Flash The SDS2 Server Board incorporates a Fairchild* 29LV008B 8Mbit Flash ROM.
Intel® Se rver Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 21 ISA Interrupt Description INTR Processor interrupt NMI NMI to processor IRQ1 Keyboard interrupt IRQ3 Serial port 1 o.
I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 22 Figure 3 . SDS2 Interrupt Routing Diagram (CSB5 Internal) PCIIRQ16 PCIIRQ17 PCIIRQ18 PCIIRQ19 PCIIRQ20 PCIIRQ21 PCIIR.
Intel® Server Board SDS2 I/O Subsystem Revision 1.2 Order Number: A85874 - 002 23 Figure 4 . SDS2 Interrupt Routing Diagram PCIIRQ1 PIRQ_LATCH PCIIRQ3 PIRQ1 PCIIRQ2 PCIIRQ4 PCIIRQ5 PCIIRQ6 PCIIRQ7 PC.
I/O Subsystem Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 24 PCI IRQ 6 PCI IRQ 5 PCI IRQ 13 PCI IRQ 11 PCI IRQ 12 NIC 1 NIC 2 VIDEO INTA INTB INTC INTD SCSI PORT A PORT B Slot 2 Slot 1 Slot 4 Slot 3 Slot 6 Slot 5 PCI IRQ 7 PCI IRQ 8 PCI IRQ 9 PCI IRQ 10 PCI IRQ 2 PCI IRQ 3 PCI IRQ 4 PCI IRQ 0 PCI IRQ 1 ZCR Present Figure 5 .
Intel® Server Board SDS2 Server Management Revision 1.2 Order Number: A85874 - 002 25 5. Server Management The SDS2 server management features are implemented using the Sahalee Server Board Management Controller chip. The Sahalee BMC is an ASIC packaged in a 156 - pin BGA that contains a 32 - bit RISC processor core and associated peripherals.
Serve r Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 26 BASEBOARD PROCESSOR SOCKETS SMS I/F System Bus 5V 12V 3.3V -12V Power Button Front Panel NMI Switch IERR (2) The.
Intel® Server Board SDS2 Server Management Revision 1.2 Order Number: A85874 - 002 27 5.1 Sahalee Baseboard Management Controller The Sahalee BMC contains a 32 - bit RISC processor core and associated peripherals used to monitor the system for critical events.
Server Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 28 Pin Signal Name Description 13 N_SM2_CLK Serial Bus Clock 14 N_SM2_DATA Serial Bus Data 18 N_ADM_FAN_PWM Pulse - .
Intel® Server Board SDS2 Server Manage ment Revision 1.2 Order Number: A85874 - 002 29 Pin Signal Name Description C14 N_FAN6_SENSE_P Rear System Fan 2 Speed L12 N_MEM_ALERT_L Memory ECC Error Detect.
Server Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 30 5.2 System Reset Con trol Reset circuitry on the SDS2 Server Board looks at resets from the front panel, CSB5 , ITP, and processor subsystem to determine proper reset sequencing for all types of reset.
Intel® Server Board SDS2 Server Management Revision 1 .2 Order Number: A85874 - 002 31 Table 17 . IPMB Bus Devices Function Voltage Address Notes SCSI HSBP - A 5VSB 0xC0 SCSI HSBP - B 5VSB 0xC2 OEM Connector 5VSB N/A In addition to the “public” IPMB, the Sahalee BMC also has five private I 2 C busses.
Server Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 32 Function Voltage Address Notes CSB5 3.3 V 0xC2 South Bridge DIMM 1 3.3 V 0xA0 DIMM 2 3.3 V 0xA2 DIMM 3 3.3 V 0xA4 DIMM 4 3.3 V 0xA6 DIMM 5 3.3 V 0xA8 DIMM 6 3.3 V 0xAA PCK2001M 3.
Intel® Server Board SDS2 Server Management Revision 1.2 Order Number: A85874 - 002 33 uncorrectable errors. In addition, the HE - SL can ge nerate BERR# on unrecoverable ECC errors detected on the processor bus. Unrecoverable errors are routed to NMI by BIOS.
Serve r Management Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 34 Setup Utility (F2) can change th e AC link mode settings..
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 35 6. BIOS This section describes the BIOS - embedded software for the SDS2 server board.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 36 • OEM customization • PCI and Plug and Play (PnP) BIOS interface • Console redirection • Resource allocation support 6.2 BIOS Error Handling This section defines how errors are handled by the system BIOS on the SDS2 server board .
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 37 The BIOS logs the following SEL entries. Table 22 . BIOS Generated SEL Errors Sensor Type Sensor Number Sensor Type Code Senso.
BIOS Intel® Server Board SDS2 Revis ion 1.2 Order Number: A85874 - 002 38 Table 23 : Event Request Message Event Data Field Contents Event Trigger Class Event Data Discrete 7:6 00 = Unspecified byte .
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 39 6.2.3.3 Memory Bus Error The BMC monitors and logs memory errors. The BIOS will configure the hardware to notify the BMC on correctable and uncorrectable memory errors. Uncorrectable errors generate an SMI to stop the system and prevent propagation of the error.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 40 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers Power Unit Status 01h Power Unit - 09h Sensor Speci.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 41 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers BB - 12V 10h Voltage – 02h Threshold - 01h - BB V.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 42 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers Fan Boost Front Panel Temp 3Ch OEM - C7h Threshold .
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 43 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers Power Supply 2 5Bh Power Supply - 08h Sensor Specif.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 44 Sensor Name Sensor # Sensor Type Event/ Reading Type Event Offset Triggers DIMM 6 6Dh Slot Connector - 21h Sensor Specific - 6.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 45 6.2.5 Error Messages and Error Codes The system BIOS displays error messages on the video screen. Before video initialization, beep codes inform the user of errors. POST error codes are logged in the System Event Log.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 46 The following table contains the POST codes displayed during the boot process.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 47 CP Beeps Reason 1C Reset Programmable Interrupt Controller 20 1 - 3 - 1 - 1 Test DRAM refresh 22 1 - 3 - 1 - 3 Test 8742 Keybo.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 48 CP Beeps Reason 59 Initialize the POST display service 5A Display prompt “P ress F2 to enter SETUP” 5B Disable L1 cache du.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 49 CP Beeps Reason 97 Fix up Multi Processor tabl e 98 1 - 2 Search for option ROMs.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 50 6.2.5.3 POST Error Codes and Messages The following table defines POST error codes and their associated messages. The BIOS prompts the user to press a key in case of serious errors.
Intel® Server Boar d SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 51 Code Error Message Failure Description 0614 COM A config. error - device disabled 0615 COM B configuration changed 0616 COM B config. error - device disabled 0617 Floppy configuration changed 0618 Floppy config.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 52 Code Reason for Beep 1 - 5 - 1 - 1 FRB failure (processor failure) 1 - 5 - 2 - 1 Empty Processor 1 - 5 - 2 - 2 No Processor 1 - 5 - 2 - 3 Processor configuration error (e.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 53 Options Menu Each Option Menu occupies the left and center sections o f the screen. Each menu contains a set of features. Selecting certain features within a major Option Menu drops you into submenus.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 54 Key Option Description F1 Help Pressing F1 on any menu invokes the g eneral Help window. This window describes the Setup key legend. The up arrow, down arrow, Page Up, Page Down, Home, and End keys scroll the text in this window.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A858 74 - 002 55 6.3.2.3 Menu Selection Bar The Menu Selection Bar is located at the top of the screen. It displays the various major menu selections available to the user: • Main Menu . • Advanced Menu .
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 56 Feature Option Description Spanish Italian French German Table 33 . Primary Master and Slave IDE Submenu Selections Feature Option Description Type Auto None CDROM User ATAPI Removable IDE Removable Other ATAPI Select the byte of device that is attached to the IDE.
Intel® Server Board SDS2 BIOS Revision 1.2 Order N umber: A85874 - 002 57 Feature Option Description Transfe r Mode Standard FPIO 1 FPIO 2 FPIO 3 FPIO 4 FPIO 3 / DMA 1 FPIO 4 /DMA 2 Select the method for moving data to/from the drive. This field is informational only, for Type Auto.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 58 6.3.2.3.2 Advanced Menu Selections The followin g tables describe the menu options and associated submenus available on the Advanced Menu . Please note that MPS 1.4/1.1 selection is no longer configurable.
Intel® Server Board SDS2 BIOS Revisio n 1.2 Order Number: A85874 - 002 59 Extended RAM Step Disabled 1 MB 1 KB Every - Location Selec ts the size of step to use during Extended RAM tests.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 60 Feature Option Description Option ROM Scan Enabled Disabled Enable option ROM scan of the selected device.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 61 Table 41 . I/O Device/Peripheral Configuration Submenu Selections Feature Option Description Serial Port 1 Disabled Ena bled Auto If set to “Auto,” BIOS or OS configures the port.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 62 Table 42 . Advanced Chipset Control ler Submenu Selections Feature Option Description PCI Device Selects sub - menu Wake On Ring Enabled Disabled Only controls legacy wake up. May not be present if not supported.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 63 Feature Option Description Set Administrative Password Press Enter When the Enter key is press ed, the user is prompted for a password; press ESC key to abort. Once set, can be disabled by setting to a null string, or clear password jumper on board.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 64 Feature Option Descriptio n Assert NMI on PERR Disabled Enabled If enabled, PCI bus parity error (PERR) is enabled and is routed to NMI. Assert NMI on SERR Enabled Disabled If enabled, PCI bus system error (SERR) is enabled and is routed to NMI.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 65 Table 47 . Console Redirection Submenu Selections Feature Option Description Serial Port Address Disabled On - b oard COM A On - b oard COM B When enabled, Console Redirection uses the I/O port specified.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 66 Table 49 . Hard Drive Selections Option Description Drive #1 (or actual drive string) Other bootable cards Additional entries .
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 67 6.3.3 CMOS M emory Definition The CMOS map is available in the NVRAM .LST file generated for every BIOS release. The CMOS map is subject to change without notice. 6.3.4 Clearing CMOS The BIOS detects the state of the CMOS jumper.
BIOS Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 68 This file is loaded into the PHLASH program with the /b=<bin file>. The disk created by the BIOS.EXE program automatically run s “PHLASH /s /b=PLATCXLU.BIN command” in non - interactive mode.
Intel® Server Board SDS2 BIOS Revision 1.2 Order Number: A85874 - 002 69 5. Turn on system power. The system boots from the recovery diskette. The BIOS will beep twice when the update process starts. The system will continue to beep while updating the BIOS.
Clock/Voltage Generation and Distribution Intel® Server Board SDS2 Revision 1.2 Order Number: A8587 4 - 002 70 7. Clock/Voltage Generation and Distribution 7.
Intel® Server Board SDS2 Clock/Voltage Gener ation and Distribution Revision 1.2 Order Number: A85874 - 002 71 HOST CLK APIC CLK 48 MHz 14 MHz PCI 33MHz CLK PCI 66MHz CLK CPU 1 CPU 2 HE-SL CSB5 PCI 3.
Clock/Voltage Generation and Distribution Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 72 7.2 Voltage T he system power supply provides +3.3V, +5V, +12V, - 12V, and +5VSB and voltage regulators on the Server Board are used to create the following voltages: • +3.
Intel® Server Board SDS2 Clock/Voltage Generation and Distribution Revision 1.2 Order Number: A85874 - 002 73 Power Supply -12V +12V +5V +3.3V +5VSB 5VSB --> 3.3VSB 5V--> 2.5V 5V--> 1.8V SCSI Term Processor 1 Processor 2 HE-SL CIOB20 CSB5 NIC 1 NIC 2 Sahalee CORE VRM VTT VRM Super I/O VIDEO SCSI Fan KB/ MS USB PCI Slots DIMM Figure 9 .
Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 74 8. Connections 8.1 Power Distribution Board Connector The main power supply connection is obtained using a 24 - pin connector. A separate 8 - pin connector is used for the +12 V power connector dedicated to providing power to the processor.
Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 75 3 PS_ALERT (Not Used) 4 ReturnS 5 3.3RS 8.2 Memory Module Connector The SDS2 Server Board has six PC - 133 SD RAM DIMM connectors and supports registered SDRAM modules.
Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 76 8.3 System Management Headers 8.3.1 ICMB Connector The Intelligent Chassis Management Bus (ICMB) allows inter - chassis communications between intelligen t chassis.
Intel® Server Board SDS2 Conne ctions Revision 1.2 Order Number: A85874 - 002 77 Table 59 . HSBP - B Connector Pin - out Pin Signal Name Description 1 IPMB_SDA 5 VSB Data Line 2 GND GND 3 IPMB_SCL 5 VSB Clock Line 4 I2C_ADR_CNTRL Address Control 8.4 Front Panel Header A 34 - pin header is provided for cabling to the system front panel.
Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 78 8.5 PCI Slot Connector The Server Board support two 32 - bit, 33 - MHz 5V PCI Slots and four 64 - bit, 66 - MHz 3.3 V PCI Slots. The tables below define their pin - outs.
Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 79 Pin Side B Side A Pin Side B Side A 1 - 12 V TRST# 49 M66EN AD[09] 2 TCK +12 V 50 Ground Ground 3 Ground TMS 51 Ground Ground 4 TDO TDI 52 AD[08] C/BE[0]# 5 +5 V +5 V 53 AD[07] +3.
Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 80 Pin Side B Side A Pin Side B Side A 45 AD[14] +3.3 V 91 Ground AD[32] 46 Ground AD[13] 92 RSV RSV 47 AD[12] AD[11] 93 RSV Ground 48 AD[10] Ground 94 Ground RSV 8.6 I/O Connectors 8.
Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 81 Connector Contact Number Signal Name Signal Name Connector Contact Number 3 +DB(14) - DB(14) 37 4 +DB(15) - DB(15) 38 5.
Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 82 1 TXDP 7 RXDP 2 TXDM 8 RXDM 3 N/C 9 Activity LED Cathode 4 N/C 10 Link LED Anode 5 N/C 11 Speed LED Anode 6 N/C 12 3VSB 8.6.4 IDE Connector There is one IDE channel on the Se rver Board through the use of a 40 - pin connector.
Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 83 Pin Signal Name 1 Fused 5 V 2 USB_PORT1_D - 3 USB_PORT1_D+ 4 GND 5 Fused 5 V 6 USB_PORT2_D - 7 USB_PORT2_D+ 8 GND 9 Fus.
Connections Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 84 Table 69 . 34 - pin F loppy Connector Pin - out Pin Signal Name Pin Signal Name 1 GND 2 FD_DENSEL 3 GND 4 Test Point 5 .
Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 85 Pin Signal Name Description 1 DCD Data Carrier Detect 2 RXD Receive Data 3 TXD Transmit Data 4 DTR Data Terminal Ready 5 GND Ground 6 DSR Data Set Ready 7 RTS Request to Send 8 CTS Clear to Send 9 RI Ring Indicate 10 KEY Key 8.
Connections Intel® Server Board SDS2 Revision 1.2 Or der Number: A85874 - 002 86 Keyboard Mouse Pin Signal Name Pin Signal Name 1 KBDATA 1 MSDATA 2 N/C 2 N/C 3 GND 3 GND 4 Fused 5V 4 Fused 5V 5 KBCLK 5 MSCLK 6 N/C 6 N/ C 8.7 Miscellaneous Headers 8.7.
Intel® Server Board SDS2 Connections Revision 1.2 Order Number: A85874 - 002 87 Table 76 . External Drive Activity Header Pin - o ut Pin Signal name 1 N/C 2 DRIVE_ACTIVITY 3 DRIVE_ACTIVITY 4 N/C 8.
Jumpers Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 88 CN Numbers Qty Manufacturer Mfg. Part # Functional Description 25 1 FOXCONN MH11061 - PD2 25 - pin DSUB parallel port conne.
Intel® Server Board SDS2 Jumpers Revision 1.2 Order Number: A85874 - 002 89 1 2 CLOSED = CMOS Clear DEFAULT FUNCTION OPEN OPEN OPEN OPEN OPEN CLOSED = Password Disable CLOSED = RSV CLOSED = RSV CLOSE.
Jumpers Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 90 5 6 7 8 9 10 2 1 3 4 11 12 CN42 CMOS Clear FUNCTION Password Disable RSV RSV BIOS Recovery CPU Frequency Select FUNCTION RS.
Intel® Server Board SDS2 Jumpers Revision 1.2 Order Number: A85874 - 002 91 The following tables describe each jumper options. Table 78 . System Configuration Jumper Options Option Description CMOS Clear When CN42’s pins 1 and 2 are OPEN (default), CMOS contents are preserved through the system reset.
Jumpers Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 92 Table 80 . List of Assembled Jumpers in Pr oduction Jumper Pins Default Operation 1 – 2 Open When closed, clears CMOS dur.
Intel® Se rver Board SDS2 Jumpers Revision 1.2 Order Number: A85874 - 002 93 2. Power off the system, unplug the power cord, and remove the chassis panel. 3. Add a jumper on CN42 pins 9 - 10 (BIOS Recovery). 4. Insert the BIOS Recovery floppy diskette into the disk drive.
Electrical and Thermal Specifications Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 94 10. Electrical and Thermal Specifications This section describes the electrical and thermal specifications required to integrate this board in a system.
Intel® Server Board SDS2 Electrical and Thermal Specifications Revision 1.2 Order Number: A85874 - 002 95 Table 82 . SDS2 Server Board Power Consumption Device(s) +3.3 V +5 V +12 V - 12 V 5 V Stan dby Server Board 3.85 A 2.5 A 0.3 A 0.1 A 1.2 A Processors – – 6.
Electrical and Thermal Specifications Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 96.
Intel® Server Board SDS2 Electrical and Thermal Specifications Revision 1.2 Order Number: A85874 - 002 97 Figure 13 . Output Voltage Timing Table 85 : Turn On/Off Timing Item Description Min Max Units T sb_on_delay Delay from AC being applied to 5VSB being within regulation.
Intel® Server Board SDS2 Mechanical Specifications Revision 1.2 Order Nu mber: A85874 - 002 101 11. Mechanical Specifications The following figure shows the Server Board mechanical drawing.
Regulatory and Integration Information Intel® Ser ver Board SDS2 Revision 1.2 Order Number: A85874 - 002 102 12. Regulatory and Integration Information 12.1 Regulatory Compliance The SDS2 server board complies with the following safety standard requirements .
Intel® Server Board SDS2 Regulatory and Integration Information Revision 1.2 Order Number: A85874 - 002 103 UL Recognition Mark (USA/Canada) CE Mark (Europe) C - Tick Mark (Australia) GOST Mark (Russia) BSMI Mark (Taiwan) 12.
Regulatory and Integration Information Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 104 If the host chassis, power supply, and other modules have not passed applicable EMC certification testing before integration, EMC testing must be conducted on a representative sample of the newly completed computer.
Intel® Server Board SDS2 Regulatory and Integration Information Revision 1.2 Order Number: A85874 - 002 105 12.2.5 Use Only for Intended Applications This product was evaluated for use in ITE computers that will be installed in offices, schools, computer rooms and similar locations.
Errata Listing Intel® Ser ver Board SDS2 Revision 1.2 Order Number: A85874 - 002 106 13. Errata Listing 13.1 Summary Errata Table The fo llowing tables indicate the errata and the document changes that apply to the Intel® Server Board SDS2 .
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 107 21. Fixed Fab 5 Keyboard and Mouse do not function under Microsoft* Windows* 2000 when legacy USB is enabled in BIOS setup 22. Fixed Data miscompares when using Seagate* ATA III model ST310215A hard drives 23.
Errata Listing Intel® Server Board SDS2 Revis ion 1.2 Order Number: A85874 - 002 108 13.2 Errata [DD1] 1. Intel® RAID controller SRC MR not yet supported with Intel® Server Board SDS2 Problem: The Intel RAID Controller SRCMR installed on the Intel Server Board SDS2 is currently an unsupported configuration.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 109 in BIOS Setup, the following error message will appear when attempting to update the FRU/SDR files: Updating the FR.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 110 Server Board SDS2 does not service this interrupt when the BIOS Logo screen is enabled.
Intel® Serve r Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 111 2. On the Utilities page, drop down the menu and choose the Platform Confidence Test option. 3. Click on the Create Diskette icon that appears and when prompted, choose to save the file to a temporary folder on your hard drive.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 112 Problem: Microsoft* Wi ndows* 2000 NIC driver set 5.1.2 v.5.41.27 prevents the Intel® Server Board SDS2 from making a DPC LAN connection when the operating system is loaded.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 113 1600x1200 Not supported. Workaround: Utilize a video mode that is currently supported by the SDS2 Server Board. Status: Fixed. SDS2 BIOS Production Release 2.4 (Build 47) and later versions have added support for additional high resol ution video modes.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 114 Implic ation: The SDS2 server board will not complete POST if more than 4GB or more of total system memory is installed and the Extended RAM step option in BIOS Setup is set to “Every Location”.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 115 Workaround: This issue does not occur when the SDS2 onboard SCSI controller option ROM is set to “Disabled”. To disable the SDS2 onboard SCSI controller option ROM, access the Intel® Server Board SDS2 BIOS Setup by pressing F2 during POST.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 116 In addition to this message, the SC5100 front panel system status LED will light solid amber, indicating a system temperature fault.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 117 Implication: The SDS2 sy stem BIOS will enter the PXE boot sequence if various numeric keys are pressed during POST. Workaround: Do not enter numeric keys during the POST process.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 118 Implication: If you are installing the Intel Server Board SDS2 into the Intel SC5100 Server Chassis, Intel recommends installing the rubber bumper included with the server board.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 119 Figure 1 . Placing the Rubber Bumper in the Chassis Workaround: Utilizing the rubber bumper with the SDS2 Server Board is a workaround for issues th at may occur due to vibration during shipment of the integrated system product.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 120 22. Data miscompares when using Seagate* ATA III model ST310215A hard drives Problem: Intel has induced data miscompares in SDS2 sytems configured with a Seagate* ATA III model ST310215A hard drive under extreme workloads during validation testing.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 121 Problem: Mechanical interference between the Myelex installed memory module (DIMM) and the onboard SCSI connector occurs if a Wide or Singled Ended SCSI cable is installed on embedded SCSI A or B connector.
Errata Listing Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 122 28. OB P100 NICs do not show at POST but attempt PXE boot and appear in Boot Menu Problem: On board NIC are not display ed during post but do appear in Boot Device menu.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 123 Status: Will Not Fix. 30. Can Not Change BIOS SETUP IDE Options Using <Enter> Key Problem: In SETUP, when attempting to change any option under the Primary/Secondary IDE controller sub - menu, one must use the space bar.
Errata Listing Intel® Server Boar d SDS2 Revision 1.2 Order Number: A85874 - 002 124 Alternatively, the updated drivers may installed using the following procedure to install NW6. . a) Boot to DOS and fdisk/format the C: p artition. b) Boot to C: drive and load loddvc.
Intel® Server Board SDS2 Errata Listing Revision 1.2 Order Number: A85874 - 002 125 34. Peer - to - peer PCI transactions are not supported betwee n the CIOB - controlled 64 - bit PCI bus and the leg.
Errata Listing Intel® Server Board SDS2 Revision 1.2 O rder Number: A85874 - 002 126 therefore does not display any text messages and does not allowing the CTRL - S option.
Intel® Server Board SDS2 Glossary Revision 1.2 Order Number: A85874 - 002 I Glossary This appendix contains important terms used in the preceding chapters. For ease of use, numeric entries are listed first (e.g., “82460GX”) with alpha entries following (e.
Glossary Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 II Term Definition Mux multiplexor NMI Non - maskable Interrupt OEM Original equipment manufacturer Ohm Unit of electrical re.
Intel® Server Board SDS2 Reference Documents Revision 1.2 Order Number: A85874 - 002 III Reference Documents Refer to the following documents for additional information: Refer to the following documents for additional information: • Coppermine - T Processor Data Sheet Rev 1.
Index Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 IV Index 1 1.25V, 39 12V, 39 - 12V, 39 2 2.5 V logic levels, 68 2.5V, 39 29LV008B, 3, 20 2 - way interleaved SDRAM, 6, 9 3 3.
Index Intel® Ser ver Board SDS2 Revision 1.2 Order Number: A85874 - 002 II D Data channels , 21 Data transfer, 8 Device ID, 11, 12 DIMM, 42 DIMM sockets, 2, 6 DMA Mode, 17 DP8473, 19 E Errata Summary.
Intel® Server Board SDS2 Index Revision 1.2 Order Number: A85874 - 002 III Memory configuration requirements , 6 Memory controller, 2, 4, 6, 8 Memory interleaving , 6 Memory scrubbing , 6, 9 MIRQ#, 3.
Index Intel® Server Board SDS2 Revision 1.2 Order Number: A85874 - 002 IV SCSI Controller, 13, 68 SDRAM DIMM connectors, 73 Security, 51, 54 Processor, 45, 46 SEL Log Sensors, 38 Sensor Event , 37 Se.
Intel® Server Board SDS2 Index Revision 1.2 Order Number: A85874 - 002 V Zero - channel RAID controller , 14.
An important point after buying a device Intel SDS2 (or even before the purchase) is to read its user manual. We should do this for several simple reasons:
If you have not bought Intel SDS2 yet, this is a good time to familiarize yourself with the basic data on the product. First of all view first pages of the manual, you can find above. You should find there the most important technical data Intel SDS2 - thus you can check whether the hardware meets your expectations. When delving into next pages of the user manual, Intel SDS2 you will learn all the available features of the product, as well as information on its operation. The information that you get Intel SDS2 will certainly help you make a decision on the purchase.
If you already are a holder of Intel SDS2, but have not read the manual yet, you should do it for the reasons described above. You will learn then if you properly used the available features, and whether you have not made any mistakes, which can shorten the lifetime Intel SDS2.
However, one of the most important roles played by the user manual is to help in solving problems with Intel SDS2. Almost always you will find there Troubleshooting, which are the most frequently occurring failures and malfunctions of the device Intel SDS2 along with tips on how to solve them. Even if you fail to solve the problem, the manual will show you a further procedure – contact to the customer service center or the nearest service center
