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P erf ormance Guidelines f or AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr ocessor Systems Application Note 40555 Publication # Revision: 3.00 June 2006 Issue Date:.
© 2006 Advanced Micr o Devices, Inc. All rights reserv ed. The contents of this document are provided in connection with Advanced Micro De vices, Inc.
Contents 3 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Contents Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Contents 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems A.2.1 What Resources Are Used When a Single Read-Only or Write-Only Thread Accesses Remote Data? . . . . . . . . . . .
List of Figur es 5 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 List of Figures Figure 1. Quartet Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 List of Figur es 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems.
Revision History 7 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Re vision Histor y Date Revision Descript ion June 20 06 3.
8 Revision History 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems.
Chapter 1 Intr oduction 9 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Chapter 1 Intr oduction The AMD Athlon™ 64 and AM.
10 Intr oduction Chapter 1 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems bandwidth test, it ex ercises both of these modes of operation.
Chapter 1 Intr oduction 11 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 [12] http://msdn.microsoft.com/library/default.asp?url=/library/ en-us/dngenlib/html/ msdn_heapmm.asp [13] http://msdn.
12 Intr oduction Chapter 1 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems.
Chapter 2 Experimental Setup 13 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Chapter 2 Experimental Setup This chapter presents a description of the experi mental en vironment within which the following performance study was carried out.
14 Experimental Setup Chapter 2 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems Figure 1. Quartet T opolog y The term hop is commonly used to describe access dist ances on NUMA systems.
Chapter 2 Experimental Setup 15 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Figure 2.
16 Experimental Setup Chapter 2 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems resources approach saturation.
Chapter 2 Experimental Setup 17 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 characterization of the resource beha vior in the system.
18 Experimental Setup Chapter 2 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems 2.3.2 Labels Used Each of the bars on the graph is labele d with the hop information for the thread.
Chapter 3 Analysis and Recommendations 19 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Chapter 3 Anal ysis and Recommendations This section lays out recommendations to de ve lopers.
20 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems 3.
Chapter 3 Analysis and Recommendations 21 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 distance. If they are indirectly connected to each ot her in a 4P conf iguration, it is considered as a 2 hop access distance.
22 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems Figure 5.
Chapter 3 Analysis and Recommendations 23 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 A ccNUMA-aw are OS keeps data local on the node wh ere f irst-touch occurs as long as there is enough physical memory a vailable on that node.
24 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems afterwords no longer needs the data structure and if only one of the work er threads needs the data structure.
Chapter 3 Analysis and Recommendations 25 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Spec JBB 2005 was run using the NUMA tools pro vided by Linux ® to measu re the performance improv ement with node interlea vi ng.
26 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems • Threads firing at each other ( cr ossfire ) The f irst thread runs on node 0 and writes to me mory on node 1 (1 hop).
Chapter 3 Analysis and Recommendations 27 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Here the same two fore ground threads as before were run t hough the cases as before— local , cr ossfire and no cr ossfir e .
28 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems Figure 8.
Chapter 3 Analysis and Recommendations 29 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.
30 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems This analogy clearly communicates the performance ef fects of queuing time versus latency .
Chapter 3 Analysis and Recommendations 31 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Ho wev e r , as shown in Figure 11 on page 31, when both threads are write-only , the 0 hop-1 hop and 0 hop-2 hop cases are faster than the 0 hop-0 hop case.
32 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems In addition, three background thre ads are running on nodes 1, 2 and 3. Each of these background threads access data loca lly .
Chapter 3 Analysis and Recommendations 33 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Figure 13. Both Write-Only Threads Running on Node 0 (Diff erent Cores) under Medium Bac kground Load (High Subscription) Figure 14.
34 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems Figure 15.
Chapter 3 Analysis and Recommendations 35 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.
36 Analysis and Recommendations Chapter 3 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems.
Chapter 4 Conclusions 37 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Chapter 4 Conc lusions The single most important recommendation for most applications is to keep data local on node where it is being accessed.
38 Conclusions Chapter 4 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems Data placement tools can also come in handy when a thread needs more data than the amount of physical memory a vailable o n a node .
Appendix A 39 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Appendix A The follo wing sections provide additional e xplanator y information on topics disc ussed in the pre vious sections of this document.
40 Appendix A 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems Like wise packets to be transmitted from the MCT to the XB ar are queued in the “MCT -to-XBar” buf fers. The buf f ers in the SRI, XBar and MCT can be vie wed as staggered queues on the v arious units.
Appendix A 41 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 4.4 GB/s necessary . The two coherent HyperT ranspor t links are loaded at 3.5 GB/s each. Thus the utilization of each of the two co herent HyperT ransport links that connect node 0 and node 1 equals 87% (3.
42 Appendix A 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems A.3 Wh y Is the No Cr ossfire Case Slo wer Than the Cr ossfire .
Appendix A 43 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 A.5 Wh y Is 0 Hop-1 Hop Case Slo wer Than 0 Hop-0 Hop Case on a.
44 Appendix A 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems A.7 T ools and APIs f or Thread/Pr ocess and Memory Placement (.
Appendix A 45 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 Controlling Memory Affinity Both numactl and libnuma library functions can be u sed to set memory af f inity[ 5 ].
46 Appendix A 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems The function to set memory af finity for a thread is V irtualAlloc( ) [ 9 ]. This function giv es the de veloper the choice to bind memory immediately on allocation or to defer binding until f irst touch.
Appendix A 47 Performance Guidelines for AMD Athlon™ 64 and AMD Opter on™ ccNUMA Multipr o cessor Systems 40555 Rev . 3.00 June 2006 A.8.4 Node Interlea ving Configuration in the BIOS AMD Opteron.
48 Appendix A 40555 Rev . 3.00 June 2006 Performance Guidelines for AMD Athlon™ 64 an d AMD Opter on™ ccNUMA Multipr ocessor Systems.
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