Instruction/ maintenance manual of the product STK14D88 Cypress
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STK14D88 32Kx8 AutoS tore™ nvSRAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-52037 Rev .
STK14D88 Document Number: 001-52037 Rev . ** Page 2 of 17 Pin Configurations Figure 1. Pin Diagr a m 48 -Pi n SSOP/ 32-SOIC Pin Descriptions Pin Name I/O Description A 14 -A 0 Input Address : The 15 a.
STK14D88 Document Number: 001-52037 Rev . ** Page 3 of 17 Absolute Maximum Ratings V oltage on Input Relative to Ground................. –0.5V to 4.1V V oltage on Input Relative to V SS ...........–0.6V to (V CC + 0.5V) V oltage on DQ 0-7 or HSB .
STK14D88 Document Number: 001-52037 Rev . ** Page 4 of 17 V OL Output Logic “0” V oltage 0.4 0.4 V I OUT = 4mA T A Operatin g T e mperatur e 0 70 - 40 85 ° C V CC Operating V oltage 2.
STK14D88 Document Number: 001-52037 Rev . ** Page 5 of 17 Figure 5. SRAM READ Cycle 2: E Controlled [4, 7] SRAM READ Cycles #1 and #2 NO. Symbols Parameter STK14D 88-25 STK14D88-35 ST K14D88-45 Unit Min Max Min Max Min Max #1 #2 Alt.
STK14D88 Document Number: 001-52037 Rev . ** Page 6 of 17 SRAM WRITE Cycle #1 and #2 NO. Symbols Parameter STK1 4D88-25 STK14D88 -35 STK14D88-45 Unit Min Max Min Ma x Min Max #1 #2 Alt.
STK14D88 Document Number: 001-52037 Rev . ** Page 7 of 17 AutoS tore/PO WER UP RECALL No. Symbols Alt. Parameter STK14D88 Unit Notes Min Max 22 t RECALL Po wer up RECALL Duration 20 ms 10 23 t STORE t HLHZ STORE Cycle Duration 12.5 ms 1 1, 12 24 V SWITCH Low V oltage Trigger Level 2.
STK14D88 Document Number: 001-52037 Rev . ** Page 8 of 17 Sof tware-Controlled ST ORE/RECALL Cycle [13, 14] No. Symbols Parameter STK14D88-25 STK14D88-35 STK14D88-45 Unit Notes E Cont Alternate Min Ma.
STK14D88 Document Number: 001-52037 Rev . ** Page 9 of 17 Hardware STORE Cycle NO. Symbols Parameter STK14D88 Unit Notes Stan da r d Alternat e Min Max 31 t DELA Y t HLQZ Hardware STORE to SRAM Disabled 1 70 µs 15 32 t HLHX Hardware ST ORE Pulse Width 15 ns Figure 10.
STK14D88 Document Number: 001-52037 Rev . ** Page 10 of 17 Mode Selection E W G A 14 –A 0 Mode IO Power Notes H X X X Not Selected Output High Z S tandby L H L X Read SRAM Output Data Active L L X X.
STK14D88 Document Number: 001-52037 Rev . ** Page 1 1 of 17 nvSRAM Operation nvSRAM The STK14D88 nvSRAM is mad e up of two functional compo- nents paired in the same physical cell. These are the SRAM memory cell and a nonvolatile QuantumTrap™ cell. The SRAM memory cell operates like a standar d fast static RAM.
STK14D88 Document Number: 001-52037 Rev . ** Page 12 of 17 T o initiate the software STORE cycle, the following READ sequence must be performed: 1. Read Address 0x0E38, V alid READ 2. Read Address 0x31C7, V alid READ 3. Read Address 0x03E0, V alid READ 4.
STK14D88 Document Number: 001-52037 Rev . ** Page 13 of 17 Figure 13. Current versus Cycle Time Noise Considerat ions The STK14D88 is a high-speed memory and so must have a high-frequency bypass capacitor of 0.1 µF connected between both V CC pins and V SS ground plane with no plan e break to chip V SS .
STK14D88 Document Number: 001-52037 Rev . ** Page 14 of 17 Ordering Codes Part Numbering Nomenclature Packaging Option: TR = T ape and Reel Blank = Tube S peed: 25 - 25 ns 35 - 35 ns Package: N = Plas.
STK14D88 Document Number: 001-52037 Rev . ** Page 15 of 17 Package Diagrams Figure 14. 32-Pin ( 300 Mil) SOIC (51-85127) PIN 1 ID SEATING PLANE 1 16 17 32 DIMENSIONS IN INCHES[MM] MIN. MAX. 0.292[7.416] 0.299[7.594] 0.405[10.287] 0.419[10.642] 0.050[1.
STK14D88 Document Number: 001-52037 Rev . ** Page 16 of 17 Figure 15. 48-Pin ( 300 Mil) SSOP (51-85061) Package Diagrams (continued) 51-85061-*C [+] Feedback.
Document Number: 001-52037 Rev . ** Revised March 02, 2009 Page 17 of 17 AutoS tore and Qua ntumTr ap are registered tr ademarks of Cypress Se miconductor Corpor ation. All produ cts and comp any names mentio ned in this document may be the trademarks of thei r respective holders.
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