Instruction/ maintenance manual of the product CY7C1346H Cypress Semiconductor
Go to page of 16
2-Mbit (64K x 36) Pipelined Sync SRAM CY7C1346H Cypress Semiconductor Corpora tion • 198 Champion Cou rt • San Jose , CA 95134-1 709 • 408-943-2 600 Document #: 38-05672 Rev . *B Revised April 26, 2006 Features • Registered inp uts and outputs for pipelined op er ation • 64K × 36 common I/O architecture • 3.
CY7C1346H Document #: 38-05672 Rev . *B Page 2 of 16 Pin Configuration Selection Guide 166 MHz Unit Maximum Access T i me 3.5 ns Maximum Operating Current 240 mA Maximum CMOS S tandby Cu rrent 40 mA A.
CY7C1346H Document #: 38-05672 Rev . *B Page 3 of 16 Pin Definitions Name I/O Description A 0 , A 1 , A Input- Synchronous Address Inputs used to select one of the 64K addre ss loca tions . Sampled at the rising edge of the CLK if ADSP or ADSC is active LOW , and CE 1 , CE 2 , and CE 3 are sampled active.
CY7C1346H Document #: 38-05672 Rev . *B Page 4 of 16 Functional Overview All synchronous inputs pass through input registers controlled by the rising edge of the clock. All data outputs pass through output registers controlled b y the rising edge of the clock.
CY7C1346H Document #: 38-05672 Rev . *B Page 5 of 16 Burst Sequences The CY7C1346H provid es a two-bit wraparound counter , fed by A 1 , A 0 , that implements either an interleaved or linear burst sequence. The interleaved burst sequ ence is designed specif- ically to support Intel Pentium appli cations.
CY7C1346H Document #: 38-05672 Rev . *B Page 6 of 16 T ruth T able [2, 3, 4, 5, 6, 7] Next Cycle Add. Used CE 1 CE 2 CE 3 ZZ ADSP ADSC ADV WRITE OE CLK DQ Deselect Cycle, Power-down None H X X L X L X.
CY7C1346H Document #: 38-05672 Rev . *B Page 7 of 16 WRITE Cycle, Suspend Burst Current X X X L H H H L X L-H D WRITE Cycle, Suspend Burst Current H X X L X H H L X L-H D T ruth T able (continued) [2, 3, 4, 5, 6, 7] Next Cycle Add.
CY7C1346H Document #: 38-05672 Rev . *B Page 8 of 16 Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) S torage T emperature ................ .............. ... –65 ° C to +150 ° C Ambient T e mperature with Power Applied .
CY7C1346H Document #: 38-05672 Rev . *B Page 9 of 16 Cap acit ance [10] Parameter Description T est Conditions 100 TQFP Max. Unit C IN Input Capacitance T A = 25 ° C, f = 1 MHz, V DD = 3.
CY7C1346H Document #: 38-05672 Rev . *B Page 10 of 16 Switching Characteristics Over the Operating Range [1 1, 12] Parameter Description -166 Unit Min. Max. t POWER V DD (T ypical) to the First Access [13] 1 ms Clock t CYC Clock Cycle T ime 6.0 ns t CH Clock HIGH 2.
CY7C1346H Document #: 38-05672 Rev . *B Page 1 1 of 16 Switching W aveforms Read Cycle Timing [17] Note: 17. On this diagram, when CE is LOW, CE 1 is LOW, CE 2 is HIGH and CE 3 is LOW.
CY7C1346H Document #: 38-05672 Rev . *B Page 12 of 16 Write Cycle T iming [17, 18] Note: 18. Full width Write can be initiate d by either GW LOW; or by GW HIGH, BWE LOW and BW [A:D] LOW.
CY7C1346H Document #: 38-05672 Rev . *B Page 13 of 16 Read/Write Cycle Timing [17, 19, 20 ] Notes: 19. The data bus (Q) remains in High- Z following a Write cycle unless an ADSP , ADSC , or ADV cycle is performed.
CY7C1346H Document #: 38-05672 Rev . *B Page 14 of 16 ZZ Mode T iming [21, 22] Notes: 21. Device must be deselected when entering ZZ mode. See Cycle Descr iptions t able for all possible signal conditions to deselect the device. 22. DQs are in High-Z when exiting ZZ sleep mode.
CY7C1346H Document #: 38-05672 Rev . *B Page 15 of 16 © Cypress Semi con duct or Cor po rati on , 20 06 . The information con t a in ed he re i n is su bject to change wi t hou t n oti ce. C ypr ess S em ic onduct or Corporation assumes no resp onsibility f or the u se of any circuitry o ther than circui try embodied i n a Cypress prod uct.
CY7C1346H Document #: 38-05672 Rev . *B Page 16 of 16 Document History Page Document Title: CY7C1346H 2-Mbit (64K x 36) Pipelined Syn c SRAM Document Number: 38-05672 REV . ECN NO. Issue Date Orig. of Change Description of Change ** 3 473 57 See ECN PCI New Data sheet *A 420879 See ECN RXU Converted from Preliminary to Fi nal.
An important point after buying a device Cypress Semiconductor CY7C1346H (or even before the purchase) is to read its user manual. We should do this for several simple reasons:
If you have not bought Cypress Semiconductor CY7C1346H yet, this is a good time to familiarize yourself with the basic data on the product. First of all view first pages of the manual, you can find above. You should find there the most important technical data Cypress Semiconductor CY7C1346H - thus you can check whether the hardware meets your expectations. When delving into next pages of the user manual, Cypress Semiconductor CY7C1346H you will learn all the available features of the product, as well as information on its operation. The information that you get Cypress Semiconductor CY7C1346H will certainly help you make a decision on the purchase.
If you already are a holder of Cypress Semiconductor CY7C1346H, but have not read the manual yet, you should do it for the reasons described above. You will learn then if you properly used the available features, and whether you have not made any mistakes, which can shorten the lifetime Cypress Semiconductor CY7C1346H.
However, one of the most important roles played by the user manual is to help in solving problems with Cypress Semiconductor CY7C1346H. Almost always you will find there Troubleshooting, which are the most frequently occurring failures and malfunctions of the device Cypress Semiconductor CY7C1346H along with tips on how to solve them. Even if you fail to solve the problem, the manual will show you a further procedure – contact to the customer service center or the nearest service center
