Instruction/ maintenance manual of the product CY7C1041DV33 Cypress Semiconductor
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Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 38-05473 Rev . *E Revised July 17, 2008 CY7C1041DV33 4 Mbit (256K x 16) S t atic RAM.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 2 of 13 Selection Guide Description –10 (Indus trial) –12 (Automotive) [2] Unit Maximum Access T ime 10 12 ns Maximum Operating Current 90 95 mA Maximum CMOS S tandby Current 10 15 mA Pin Configuration Figure 1.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 3 of 13 Maximum Ratings Exceeding maximu m ratings may shorte n the useful life of the device. These user guidelines are not teste d. S torage T emperature ........................ ......... –65 ° C to +150 ° C Ambient T emperature with Power Applied .
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 4 of 13 Cap acit ance [6] Parameter Description T est Conditions Max Unit C IN Input Capacitance T A = 2 5 ° C, f = 1 MHz, V CC = 3.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 5 of 13 AC Switching Ch aracteristics Over the Operating Range [8] Parameter Descr iption –10 (Industrial) –12 (Automotive) Unit Min Max Min Max Rea.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 6 of 13 Dat a Retention Characteristics Over the Operating Range Parameter Description Conditions [14] Min Max Unit V DR V CC for Data Retention 2.0 V I CCDR Data Retention Current V CC = V DR = 2.0V , CE > V CC – 0.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 7 of 13 Figure 5. Read Cy cle No. 2 (OE Controlled ) [17, 18] Figure 6. Write Cycle No. 1 (CE Controlled) [19, 20] Switching Waveforms (continued) 50% 5.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 8 of 13 Figure 7. Write Cycle No. 2 (BLE or BHE Controlled) Figure 8. Write Cycle No. 3 (WE Controlled , OE HIGH During Write) [19, 20] Switching Wavefo.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 9 of 13 Figure 9. Write Cycle No. 4 (WE Controlled, OE LOW) T ruth T able CE OE WE BLE BHE IO 0 –IO 7 IO 8 –IO 15 Mode Power H X X X X High-Z High-Z.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 10 of 13 Ordering Information Spe e d (ns) Ordering Code Package Diagram Package T ype Op erating Range 10 CY7C1041DV33-10BVI 51-85150 48-Ball VFBGA Ind.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 1 1 of 13 Figure 1 1. 44-Pin (400-mil) Molded SOJ (51-8508 2) Figure 12. 44-Pin TSOP II (51-85087) Package Diagrams (continue d) 51-85082-* B 51-85087-*.
CY7C1041DV33 Document #: 38-05473 Rev . *E Page 12 of 13 Document History Page Document Title: CY7C1041DV33 4 Mbit (256K x 16) St atic RAM Document Number: 38-05473 Rev . ECN N o. Orig. of Change Submissi on Date Description of Chan ge ** 20156 0 SWI See ECN A dva nce Data sheet for C9 IPP *A 233729 RKF See ECN 1.
CY7C1041DV33 © Cypress Sem iconductor Corp oration, 200 4-2008. The informatio n containe d herein is su bject to change without notice. C ypress S emiconductor Corp oration assumes no responsibility for th e use of any circuitry othe r than circuitry embod ied in a Cypress prod uct.
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