Instruction/ maintenance manual of the product CY7C1475V33 Cypress
Go to page of 32
72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL™ Architecture CY7C1471V33 CY7C1473V33 CY7C1475V33 Cypress Semiconductor Corpora tion • 198 Champion Court • San J ose , CA 95134-1709 • 408-943-2600 Document #: 38-05288 Rev .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 2 of 32 Logic Block Diagram – CY7C1471V33 (2 M x 36) Logic Block Diagram – CY7C1473V33 (4 M x 18) C MODE BW A BW B WE CE1 CE2.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 3 of 32 Logic Block Diagram – CY7C1475V33 (1 M x 72) A0, A1, A C MODE CE1 CE2 CE3 OE READ LOGIC DQ s DQ Pa DQ Pb DQ Pc DQ Pd DQ.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 4 of 32 Pin Configurations 100-Pin TQFP Pinout A A A A A1 A0 NC/288M NC/144M V SS V DD A A A A A A DQP B DQ B DQ B V DDQ V SS DQ .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 5 of 32 Pin Configurations (continued) 100-Pin TQFP Pin out A A A A A1 A0 NC/288M NC/144M V SS V DD A A A A A A A NC NC V DDQ V S.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 6 of 32 Pin Configurations (continued) 165-Ball FBGA (15 x 17 x 1.4 mm) Pinout CY7C1471V33 (2M x 36) CY7C1473V33 (4M x 18) 234 56.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 7 of 32 Pin Configurations (continued) CY7C1475V33 (1M × 72) A B C D E F G H J K L M N P R T U V W 12 3 4 567 8 9 1 1 10 DQg DQg.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 8 of 32 Pin Definitions Name IO Description A 0 , A 1 , A Input- Synchronous Address Inputs used to select one of the address loca tions . Sampled at the rising edge of the CLK. A [1:0] are fed to the two-bit burst counter .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 9 of 32 Functional Overview The CY7C1471V33, CY7 C1473V33, and CY7C1475 V33 are synchronous fl ow through burst SRAMs designed sp ecifically to eliminate wait states during write-read transitions.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 10 of 32 The data written during the wr ite operati on is controlled by BW X signals. The CY7C147 1V33, CY7C1473V33 , and CY7C1475V33 provides Byte Write capability that is described in the “T ruth T able for Read/Write” on page 12 .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 1 1 of 32 T ruth T able The truth table for CY7C1471V33, CY7C1473V33, CY7C 1475V33 follows.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 12 of 32 T ruth T able for Read/Write The read-write truth table for CY7C1471V33 follows.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 13 of 32 IEEE 1 149.1 Serial Boundary Scan (JT AG) The CY7C1471V33, CY7C1 473V33, and CY7C147 5V33 incorporate a serial bo undary scan test access p ort (T AP). This port operates in accordance with IEEE S tandard 1 149.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 14 of 32 TA P R e g i s t e r s Registers are connected betwe en the TDI and TDO ball s and enable data to be scanned into and out of the SRAM test circuitry . Only one registe r can be selected at a time thro ugh the instruction register .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 15 of 32 signal while in tran sition (metastable state). This does not harm the device, but there i s no guarantee as to the value that is captured. Repeatable results may not be possible.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 16 of 32 T AP AC Switching Characteristics Over the Operatin g Range [10, 1 1 ] Parameter Description Min Max Unit Clock t TCYC T.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 17 of 32 3.3V T AP AC T est Conditions Input pulse levels ....................... .............. ........... V SS to 3.3V Input rise and fall times ......... ........ .............
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 18 of 32 Identification Register Definitions Instruction Field CY7C1471V33 (2Mx36) CY7C1473V33 (4Mx18) CY7C1475V33 (1Mx72) Descri.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 19 of 32 Boundary Scan Exit Order (2M x 36) Bit # 165-Ball ID Bit # 165-Ball ID Bit # 165-Ball ID Bit # 165-Ball ID 1C 1 2 1 R 3 .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 20 of 32 Boundary Scan Exit Order (1M x 72) Bit # 209-Ball ID Bit # 209-Ball ID Bit # 209-Ball ID Bit # 209-Ball ID 1 A1 29 T1 57.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 21 of 32 Maximum Ratings Exceeding maximum rati ngs may impair the useful life of the device. These user guid elines are not tested. S torage T emperature ........... .............
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 22 of 32 Cap acitance T ested initially and after any design or process change that may affect these parameters. Parameter Description T est Condit ions 100 TQFP Package 165 FBGA Package 209 BGA Package Unit C ADDRESS Address Input Capacitance T A = 25 ° C, f = 1 MHz, V DD = 3.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 23 of 32 Switching Characteristics Over the Operating Range. Unless other wise noted in the following table, timi ng reference level is 1.5V when V DD Q = 3.3V and is 1.25V when V DDQ = 2.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 24 of 32 Switching W aveforms Figure 1 shows read-write timing waveform. [20, 21, 22] Figure 1.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 25 of 32 Figure 2 shows NOP , ST ALL and DESELECT Cycles waveform. [20, 21, 23] Figure 2.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 26 of 32 Figure 3 shows ZZ Mode timing waveform. [24, 25] Figure 3. ZZ Mode Timing Switching W aveforms (continued) t ZZ I SUPPLY.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 27 of 32 Ordering Information Not all of the speed, package and temper ature ranges are avail able. Please c ontact your local sales representative or visit www .cypress.com for actual products of fered.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 28 of 32 Package Diagrams Figure 4. 100-Pin Thin Plastic Quad Fl atpack (14 x 20 x 1.4 mm), 51-8 5050 NOTE: 1. JEDEC STD REF MS-026 2. BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION/END FLASH MOLD PROTRUSION/END FLASH SHALL NOT EXCEED 0.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 29 of 32 Figure 5. 165-Ball FBGA (15 x 17 x 1.4 mm), 51-85165 Package Diagrams (continued) A 1 PIN 1 CORNER 17.00±0.10 15.00±0.10 7.00 1.00 Ø0.45±0.05(165X) Ø0.25 M C A B Ø0.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 30 of 32 © Cypress Semico nductor Corpor ation, 2002- 2007. The inform ation contai ned herein is sub ject to change wi thout notice.
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 31 of 32 Document History Page Document Title: CY7C1471V33/CY7C1473V 33/CY7C1475V33, 72-Mb it (2M x 36/4M x 18/1 M x 72) Flow-Throug h SRAM with NoBL™ Architecture Document Number: 38-05288 REV .
CY7C1471V33 CY7C1473V33 CY7C1475V33 Document #: 38-05288 Rev . *J Page 32 of 32 *I 4723 35 See ECN VKN Corrected the typo in the p in configuration for 209-Ball FBGA pi nout (Corrected the ba ll name for H9 to V SS from V SSQ ). Added the Maximum Rating for Supply V oltage on V DDQ Relative to GND.
An important point after buying a device Cypress CY7C1475V33 (or even before the purchase) is to read its user manual. We should do this for several simple reasons:
If you have not bought Cypress CY7C1475V33 yet, this is a good time to familiarize yourself with the basic data on the product. First of all view first pages of the manual, you can find above. You should find there the most important technical data Cypress CY7C1475V33 - thus you can check whether the hardware meets your expectations. When delving into next pages of the user manual, Cypress CY7C1475V33 you will learn all the available features of the product, as well as information on its operation. The information that you get Cypress CY7C1475V33 will certainly help you make a decision on the purchase.
If you already are a holder of Cypress CY7C1475V33, but have not read the manual yet, you should do it for the reasons described above. You will learn then if you properly used the available features, and whether you have not made any mistakes, which can shorten the lifetime Cypress CY7C1475V33.
However, one of the most important roles played by the user manual is to help in solving problems with Cypress CY7C1475V33. Almost always you will find there Troubleshooting, which are the most frequently occurring failures and malfunctions of the device Cypress CY7C1475V33 along with tips on how to solve them. Even if you fail to solve the problem, the manual will show you a further procedure – contact to the customer service center or the nearest service center
