Instruction/ maintenance manual of the product CY62167E MoBL Cypress
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16-Mbit (1M x 16 / 2M x 8) S t atic RAM CY62167E MoBL ® Cypress Semiconductor Corpora tion • 198 Champion Court • San J ose , CA 95134-1709 • 408-943-2600 Document #: 001-15607 Rev . *A Revised June 07, 2007 Features • Configurable as 1M x 16 or as 2M x 8 SRAM • V ery high speed: 45 ns • Wide voltage range: 4.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 2 of 12 Pin Configuration [2, 3] 48-Pin TSOP I T op View Product Port folio Product V CC Range (V) Spee d (ns) Power Dissip ation Operating I CC (mA) S t andby I SB2 ( µ A) f = 1 MHz f = f max Min T yp [4] Max T yp [4] Max T yp [4] Max T yp [4] Max CY62167ELL 4.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 3 of 12 Maximum Ratings Exceeding the maximum ratings may shorten the battery life of the device. User guidelines are not tested. S torage T emperature ............. .............. ..... –65°C to + 150°C Ambient T emperature with Power Applied .
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 4 of 12 AC T est Loads and W aveforms V CC V CC OUTPUT R2 30 pF INCLUDING JIG AND SCOPE GND 90% 10% 90% 10% RISE TIME= 1 V/ns F ALL TIME= 1 V/ns OUTPUT V EQUIV ALENT TO: THÉVENIN EQUIV ALENT ALL INPUT PULSES R TH R1 Parameters V alue s Unit R1 1800 Ω R2 990 Ω R TH 639 Ω V TH 1.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 5 of 12 Switching Characteristics Over the Operatin g Range [13, 14] Parameter Descriptio n 45 ns Unit Min Max READ CYCLE t RC Read Cycle Time 45 n.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 6 of 12 Switching W aveforms Figure 1 shows address transition controlled read cycle waveforms. [18, 19] Figure 1. Read Cycle No. 1 Figure 2 shows OE controlled read cycle waveforms. [19, 20] Figure 2.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 7 of 12 Figure 3 shows WE controlled write cycle waveforms. [17, 21, 22] Figure 3. Write Cycle No. 1 Switching W aveforms (continued) t HD t SD t PWE t SA t HA t AW t SCE t WC t HZOE V ALID DA T A t BW NOTE 23 CE 1 ADDRESS CE 2 WE DA T A IO OE BHE /BLE Notes 21.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 8 of 12 Figure 4 shows CE 1 or CE 2 controlled write cycle waveforms. [17, 21, 22] Figure 4. Write Cycle No. 2 Figure 5 shows WE controlled, OE LOW write cycle waveforms. [22] Figure 5. Write Cycle No.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 9 of 12 Figure 6 shows BHE /BLE control led, OE LOW write cycle waveforms. [22] Figure 6. Write Cycle No.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 10 of 12 T ruth T able CE 1 CE 2 WE OE BHE BLE Inputs Outputs Mode Power H X X X X X Hi gh-Z Deselect/Power Down S tandby (I SB ) X L X X X X High-.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 1 1 of 12 © Cypress Semico nductor Corpor ation, 2007. The information cont ained herein is subject to ch ange without not ice. Cypress Semico nductor Corporatio n assumes no responsib ility for the use of any circuitry o ther than circuitry embodied i n a Cypress prod uct.
CY62167E MoBL ® Document #: 001-15607 Rev . *A Page 12 of 12 Document History Page Document Title: CY62167E MoB L ® 16-Mbit (1M x 16 / 2M x 8) St atic RAM Document Numb er: 001-1560 7 REV .
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