Instruction/ maintenance manual of the product CY62157EV30 Cypress
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8-Mbit (512K x 16) S t atic RAM CY62157EV30 MoBL ® Cypress Semiconductor Corpora tion • 198 Champion Court • San J ose , CA 95134-1709 • 408-943-2600 Document #: 38-05445 Rev . *E Revised May 07, 2007 Features • TSOP I package configurable as 512K x 16 or as 1M x 8 SRAM • High speed: 45 ns • Wide voltage range: 2.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 2 of 14 Product Port folio Product Range V CC Range (V) Speed (ns) Power Dissipation Operating I CC , (mA) Stan db y , I SB2 ( µ A) f = 1MHz f = f max Min T yp [2] Max T yp [2] Max T y p [2] Max T yp [2] Max CY62157EV30LL Ind’l/Auto-A 2.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 3 of 14 The following picture sh ows the 48-ball VFBGA pinout. [3, 4, 5] Pin Configuration (continued) WE V CC A 11 A 10 NC A 6 A 0 A 3 CE 1 IO 1.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 4 of 14 Maximum Ratings Exceeding maximum ratings may sh orten the battery life of the device. User gui delines are not tested. S torage T emperature ............. .............. ..... – 65°C to + 150°C Ambient T emperature with Power Applied .
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 5 of 14 Thermal Resist ance [10] Parameter Descriptio n T est Conditions BGA TSOP I TSOP II Unit Θ JA Thermal Resistance (Junction to Ambient) S till Air , soldered on a 3 × 4.5 inch, two-layer printed circuit board 72 74.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 6 of 14 Switching Characteristics Over the Operatin g Range [13, 14] Parameter Description 45 ns (Ind’l/Auto -A) Unit Min Max Read Cycle t RC R.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 7 of 14 Switching W aveforms Read Cycle No. 1 (Address T ransition Controlle d) [19, 20] Figure 3.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 8 of 14 Write Cycle No. 1 (WE Controlled) [18, 22, 23 ] Figure 5. Write Cycle No. 1 Write Cycle No.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 9 of 14 Write Cycle No. 3 (WE Controlled, OE LOW) [23] Figure 7. Write Cycle No. 3 Write Cycle No.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 10 of 14 T ruth T able CE 1 CE 2 WE OE BHE BLE Inputs/Outputs Mode Power H X X X X X High-Z Deselect/Power Down S tandby (I SB ) X L X X X X High.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 1 1 of 14 Package Diagrams Figure 9. 48-Pin VFBGA (6 x 8 x 1 mm), 51-85150 A 1 A1 CORNER 0.75 0.75 Ø0.30±0.05(48X) Ø0.25 M C A B Ø0.05 M C B A 0.15(4X) 0.21±0.05 1.00 MAX C SEATING PLANE 0.55 MAX.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 12 of 14 Figure 10. 44-Pin TSOP II, 51-85087 Package Diagrams (continued) 51-85087-*A [+] Feedback.
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 13 of 14 © Cypress Semico nductor Corporation, 200 4 -2007. The infor mation cont ained herein is subject to chang e without notice . Cypress S emicond uctor Corporation assumes no resp onsibility for the use of any circuitr y other than circuitry embodied in a Cypress product .
CY62157EV30 MoBL ® Document #: 38-05445 Rev . *E Page 14 of 14 Document History Page Document Title: CY62157EV30 MoBL ® , 8-Mbit (512K x 16) St atic RAM Document Number: 38-05445 REV .
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