Instruction/ maintenance manual of the product CY62147DV30 Cypress
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4-Mbit (256K x 16) S t atic RAM CY62147DV30 Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1 709 • 408-9 43-2600 Document #: 38-05340 Rev .
CY62147DV30 Document #: 38-05340 Rev . *F Page 2 of 12 Notes: 2. NC pins are not internally connected on the die. 3. DNU pins have to be left floati ng or tied to V SS to ensure proper application. 4. Pins H1, G2, and H6 in the VFBGA packag e are address ex p ansion pins for 8 Mb, 16 Mb, and 32 Mb, respectively .
CY62147DV30 Document #: 38-05340 Rev . *F Page 3 of 12 Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) S torage T emperature ............. .............. ...... –65°C to +150°C Ambient T emp erature with Power Applied .
CY62147DV30 Document #: 38-05340 Rev . *F Page 4 of 12 Notes: 10. T ested initially and af t er any design or proc ess changes that may affect these p arameters. 1 1. T est condition for the 45-ns part is a load capacit ance of 30 pF . 12. Full device operation requ ires linea r V CC ramp from V DR to V CC(min.
CY62147DV30 Document #: 38-05340 Rev . *F Page 5 of 12 Switching Characteristics Over the Operating Range [14] Parameter Description 45 ns [1 1] 55 ns 70 ns Unit Min.
CY62147DV30 Document #: 38-05340 Rev . *F Page 6 of 12 Switching W aveforms Read Cycle 1 (Ad dress T ransition Controlled) [18, 19] Read Cycle No. 2 (OE Controlled) [19, 20] Notes: 18. The device is contin uously selected . OE , CE = V IL , BHE and/or BLE = V IL .
CY62147DV30 Document #: 38-05340 Rev . *F Page 7 of 12 Write Cycle No. 1 (WE Controlled) [17, 21, 22] Write Cycle No. 2 (CE Controlled) [17, 21, 22] Notes: 21. Data I/O is high impedance if OE = V IH . 22. If CE goes HIGH simulta neously with WE = V IH , the output rema ins in a high-impedance stat e.
CY62147DV30 Document #: 38-05340 Rev . *F Page 8 of 12 Write Cycle No. 3 (WE Controlled, OE LOW) [22] Write Cycle No. 4 (BHE /BLE Controlled, OE LOW) [22] Switching W aveforms (continued) DATA IN t HD.
CY62147DV30 Document #: 38-05340 Rev . *F Page 9 of 12 T ruth T able CE WE OE BHE BLE Inputs/Outputs Mode Power H X X X X High Z Deselect/Power-Down S tandby (I SB ) X X X H H High Z Deselect/Power-Do.
CY62147DV30 Document #: 38-05340 Rev . *F Page 10 of 12 Package Diagram A 1 A1 CORNER 0.75 0.75 Ø0.30±0.05(48X) Ø0.25 M C A B Ø0.05 M C B A 0.15(4X) 0.21±0.05 1.00 MAX C SEATING PLANE 0.55 MAX. 0.25 C 0.10 C A1 CORNER TOP VIEW BOTTOM VIEW 2 3 4 3.
CY62147DV30 Document #: 38-05340 Rev . *F Page 1 1 of 12 © Cypress Semi con duct or C orpo ra ti on , 20 06 . The i nfo r mat ion con t ained herein is subject to ch an ge wi t hou t n oti ce. C ypr ess S em i c onductor Corpo ration assu mes no resp onsib ility for the u se of any circuitr y other than cir cuitry embodied in a Cypress product.
CY62147DV30 Document #: 38-05340 Rev . *F Page 12 of 12 Document History Page Document Title:CY62147DV30 MoBL ® 4-Mbit (256K x 16) St atic RAM Document Numb er: 38-05340 REV .
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